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AFGHL40T65SQD - onsemi

Description: AEC Q101 qualified; Maximum Junction Temperature, Tj=175°C; Very low switching and conduction losses; Positive temperature co-efficient; Tight parameter distribution; Fast Switching; Low Saturation Voltage: Vcesat=1.6V(Typ.)@Ic=75A; 100% of the parts are tested for ILM

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PCB Footprints
AFGHL40T65SQD - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO_247-3LD
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3D Models
AFGHL40T65SQD - onsemi  - 3D model - Transistor Outline, Vertical - TO_247-3LD
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AFGHL40T65SQD Details

  • Manufacturer Part Number:

    AFGHL40T65SQD

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-247-3LD

  • Manufacturer Package Code:

    340CX

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    8 Weeks

  • Date Of Intro:

    2020-01-21

  • Manufacturer:

    onsemi

  • YTEOL:

    5.35

  • Case Connection:

    COLLECTOR

  • Collector Current-Max (IC):

    80 A

  • Collector-Emitter Voltage-Max:

    650 V

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • Gate-Emitter Thr Voltage-Max:

    6.4 V

  • Gate-Emitter Voltage-Max:

    20 V

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    238 W

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • VCEsat-Max:

    2.1 V

AFGHL40T65SQD Frequently Asked Questions (FAQs)

  • A good PCB layout should prioritize thermal dissipation, with a solid ground plane and thermal vias. A heat sink or thermal interface material can be used to improve heat dissipation. Consult onsemi's application notes for specific guidance.
  • Implement a robust thermal monitoring and protection scheme, including over-temperature protection (OTP) and over-current protection (OCP). Ensure proper heat sinking, and consider using a thermistor or thermal sensor to monitor the device temperature.
  • When paralleling devices, ensure identical thermal environments, and use a common gate driver to minimize mismatch. Implement a current sharing scheme, such as active current balancing or a master-slave configuration, to ensure equal current distribution.
  • Use a high-current, low-impedance gate driver with a fast rise/fall time. Optimize the gate resistor value to minimize power loss and ensure proper switching. Consider using a gate driver with an integrated bootstrap diode for reduced power consumption.
  • Perform thorough characterization and validation tests, including static and dynamic characterization, to ensure the device meets the specified electrical and thermal performance. Consult onsemi's application notes and datasheet for specific test procedures and recommended equipment.

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