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AT25QF128A-MHB-T - Adesto Technologies

Description: QPI,8-UDFN (5X6X0.6), IND TEMP, 3V, T&R

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AT25QF128A-MHB-T - Adesto Technologies PCB footprint - Small Outline No-lead - Small Outline No-lead - 8MA1
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AT25QF128A-MHB-T - Adesto Technologies  - 3D model - Small Outline No-lead - 8MA1
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AT25QF128A-MHB-T Details

  • Manufacturer Part Number:

    AT25QF128A-MHB-T

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Transferred

  • Package Description:

    UDFN-8

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.32.00.51

  • Manufacturer:

    Adesto Technologies Corporation

  • Clock Frequency-Max (fCLK):

    133 MHz

  • JESD-30 Code:

    R-PDSO-N8

  • JESD-609 Code:

    e4

  • Length:

    6 mm

  • Memory Density:

    134217728 bit

  • Memory IC Type:

    FLASH

  • Memory Width:

    8

  • Number of Functions:

    1

  • Number of Terminals:

    8

  • Number of Words:

    16777216 words

  • Number of Words Code:

    16000000

  • Operating Mode:

    SYNCHRONOUS

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    16MX8

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    HVSON

  • Package Equivalence Code:

    SOLCC8,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE

  • Parallel/Serial:

    SERIAL

  • Seated Height-Max:

    0.6 mm

  • Supply Voltage-Max (Vsup):

    3.6 V

  • Supply Voltage-Min (Vsup):

    3 V

  • Supply Voltage-Nom (Vsup):

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Nickel/Palladium/Gold (Ni/Pd/Au)

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    1.27 mm

  • Terminal Position:

    DUAL

  • Width:

    5 mm

AT25QF128A-MHB-T Frequently Asked Questions (FAQs)

  • The AT25QF128A-MHB-T has a minimum of 100,000 erase cycles per sector, and a total of 1,000,000 erase cycles for the entire device.
  • The AT25QF128A-MHB-T has a 256-byte page write buffer. If the buffer overflows, the device will automatically start a new page write cycle, ensuring that no data is lost.
  • Adesto recommends performing a full chip erase (using the CE instruction) followed by a write to the status register (using the WRSR instruction) to initialize the device.
  • Yes, the AT25QF128A-MHB-T supports multi-master operation, but it requires careful bus arbitration and control to prevent data corruption.
  • The AT25QF128A-MHB-T can operate at clock frequencies as low as 100 kHz, but Adesto recommends a minimum frequency of 1 MHz for reliable operation.

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AT25QF128A-MHB-T Overview

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Flash, 16MX8, PDSO8