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AT25SF641-MHB-T - Adesto Technologies

Description: 64-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support.

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AT25SF641-MHB-T - Adesto Technologies PCB footprint - Small Outline No-lead - Small Outline No-lead - 8MA1
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3D Models
AT25SF641-MHB-T - Adesto Technologies  - 3D model - Small Outline No-lead - 8MA1
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AT25SF641-MHB-T Details

  • Manufacturer Part Number:

    AT25SF641-MHB-T

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Transferred

  • Package Description:

    UDFN-8

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.32.00.51

  • Manufacturer:

    Adesto Technologies Corporation

  • Clock Frequency-Max (fCLK):

    104 MHz

  • JESD-30 Code:

    R-PDSO-N8

  • Length:

    6 mm

  • Memory Density:

    67108864 bit

  • Memory IC Type:

    FLASH

  • Memory Width:

    8

  • Number of Functions:

    1

  • Number of Terminals:

    8

  • Number of Words:

    8388608 words

  • Number of Words Code:

    8000000

  • Operating Mode:

    SYNCHRONOUS

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    8MX8

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    HVSON

  • Package Equivalence Code:

    SOLCC8,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE

  • Parallel/Serial:

    SERIAL

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Programming Voltage:

    2.7 V

  • Seated Height-Max:

    0.6 mm

  • Supply Voltage-Max (Vsup):

    1.95 V

  • Supply Voltage-Min (Vsup):

    1.65 V

  • Supply Voltage-Nom (Vsup):

    1.8 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    1.27 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Width:

    5 mm

AT25SF641-MHB-T Frequently Asked Questions (FAQs)

  • The recommended operating voltage range for the AT25SF641-MHB-T is 2.7V to 3.6V.
  • The HOLD pin should be pulled high during power-up and power-down sequences to prevent unwanted writes or erases.
  • The AT25SF641-MHB-T supports up to 100,000 erase cycles.
  • A secure erase procedure can be implemented by using the Chip Erase command (0xC7) followed by a verification of the erase status using the Read Status Register command (0x05).
  • The recommended method is to poll the Write In Progress (WIP) bit in the Status Register (0x05) until it is cleared, indicating the completion of the operation.

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