Part Image

AX88796CLF - ASIX

Description: Low-Power SPI or Non-PCI Ethernet Controller

Download AX88796CLF Model
Schematic
symbols
Schematic symbol is unavailable for download
PCB
footprints
PCB footprint is unavailable for download
3D
models
3D model is unavailable for download
PCB Footprints
AX88796CLF - ASIX PCB footprint - Quad Flat Packages - Quad Flat Packages - 64-pin LQFP
click to zoom
3D Models
AX88796CLF - ASIX  - 3D model - Quad Flat Packages - 64-pin LQFP
click to zoom

AX88796CLF Details

  • Manufacturer Part Number:

    AX88796CLF

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Contact Manufacturer

  • Package Description:

    LQFP-64

  • HTS Code:

    8542.31.00.30

  • Manufacturer:

    ASIX Electronics Corporation

  • Address Bus Width:

    6

  • Boundary Scan:

    NO

  • Bus Compatibility:

    MCS-51, SPI

  • Clock Frequency-Max:

    25 MHz

  • Data Transfer Rate-Max:

    12.5 MBps

  • External Data Bus Width:

    16

  • JESD-30 Code:

    S-PQFP-G64

  • JESD-609 Code:

    e3

  • Length:

    7 mm

  • Low Power Mode:

    YES

  • Number of I/O Lines:

    6

  • Number of Terminals:

    64

  • On Chip Data RAM Width:

    8

  • Operating Temperature-Max:

    70 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP64,.35SQ,16

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • RAM (words):

    14336

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max:

    1.98 V

  • Supply Voltage-Min:

    1.62 V

  • Supply Voltage-Nom:

    1.8 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Finish:

    Pure Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.4 mm

  • Terminal Position:

    QUAD

  • Width:

    7 mm

  • uPs/uCs/Peripheral ICs Type:

    SERIAL IO/COMMUNICATION CONTROLLER, LAN

AX88796CLF Frequently Asked Questions (FAQs)

  • The recommended PCB layout for the AX88796CLF is to follow the guidelines provided in the ASIX application note AN002, which includes recommendations for component placement, routing, and thermal management.
  • The AX88796CLF can be configured for half-duplex or full-duplex mode through the DUPLEX pin. For half-duplex mode, tie the DUPLEX pin to GND, and for full-duplex mode, tie it to VCC.
  • The AX88796CLF supports cable lengths up to 100 meters, but the actual cable length may vary depending on the specific application and environment.
  • The AX88796CLF has a built-in power management feature that can be controlled through the PMEN pin. To implement power management, tie the PMEN pin to VCC to enable power management, and use the PMEN pin to control the power state of the device.
  • The recommended clock frequency for the AX88796CLF is 25 MHz, but it can operate at frequencies up to 50 MHz.

Trust Checks

This model has been provided by community users.
Community Provided
This model has been verified by system checks.
System Verified
This model has been reviewed by community users.
Community Approved
Sponsored

AX88796CLF Overview

Use the download button to access the AX88796CLF schematic symbol, PCB footprint, and 3D model.
To find more CAD model downloads similar to this part, try a partial part number search, like AX887, or try a keyword search, such as Serial IO/Communication Controllers

Parts related to AX88796CLF

Showing 0 results