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CPH3910-TL-E - onsemi

Description: VGDS : -25V (max); Forward Transfer Admittance : 40mS (typ); Ciss : 6.0pF (typ); NF : 2.1dB (typ)

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CPH3910-TL-E - onsemi PCB footprint - SOT23 (3-Pin) - SOT23 (3-Pin) - CPH3910-TL-E_
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CPH3910-TL-E - onsemi  - 3D model - SOT23 (3-Pin) - CPH3910-TL-E_
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CPH3910-TL-E Details

  • Manufacturer Part Number:

    CPH3910-TL-E

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Not Recommended

  • Part Package Code:

    CPH3

  • Pin Count:

    3

  • Manufacturer Package Code:

    318BA

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.21.00.95

  • Factory Lead Time:

    10 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    3

  • Configuration:

    SINGLE

  • Drain Current-Max (ID):

    0.05 A

  • FET Technology:

    JUNCTION

  • Feedback Cap-Max (Crss):

    2.3 pF

  • JESD-30 Code:

    R-PDSO-G3

  • JESD-609 Code:

    e6

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    DEPLETION MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation Ambient-Max:

    0.4 W

  • Power Dissipation-Max (Abs):

    0.4 W

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin/Bismuth (Sn/Bi)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    AMPLIFIER

  • Transistor Element Material:

    SILICON

CPH3910-TL-E Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1 oz copper thickness and a thermal relief pattern under the device.
  • Implement a robust thermal management system, including a heat sink and thermal interface material. Ensure good airflow and avoid thermal hotspots.
  • Use X7R or X5R ceramic capacitors with a voltage rating of 10V or higher. A 10uF input capacitor and a 22uF output capacitor are recommended.
  • Use a shielded inductor, keep the layout compact, and minimize loop areas. Add a common-mode choke and a Y-capacitor to reduce EMI.
  • The input voltage deviation should be within ±10% of the nominal input voltage to ensure reliable operation.

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CPH3910-TL-E Overview

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