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CPH5524-TL-E - onsemi

Description: Composite type with a PNP transistor and an NPN transistor contained in one package, facilitating high-density mounting.; Ultrasmall package facilitate miniaturization in end products; 0.9mm mounting height

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PCB Footprints
CPH5524-TL-E - onsemi PCB footprint - SOT23 (5-Pin) - SOT23 (5-Pin) - CPH5524-TL-E
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CPH5524-TL-E - onsemi  - 3D model - SOT23 (5-Pin) - CPH5524-TL-E
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CPH5524-TL-E Details

  • Manufacturer Part Number:

    CPH5524-TL-E

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    CPH5

  • Package Description:

    SC-74A, 5 PIN

  • Pin Count:

    5

  • Manufacturer Package Code:

    318BC

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    7

  • Case Connection:

    EMITTER

  • Collector Current-Max (IC):

    3 A

  • Collector-Emitter Voltage-Max:

    50 V

  • Configuration:

    COMMON EMITTER, 2 ELEMENTS

  • DC Current Gain-Min (hFE):

    200

  • JESD-30 Code:

    R-PDSO-G5

  • JESD-609 Code:

    e6

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    5

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    NPN AND PNP

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin/Bismuth (Sn/Bi)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

  • Transition Frequency-Nom (fT):

    380 MHz

CPH5524-TL-E Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1 oz copper thickness and a thermal relief pattern under the device.
  • Implement a robust thermal management system, including a heat sink and thermal interface material. Ensure good airflow and avoid thermal hotspots.
  • Use a reflow soldering process with a peak temperature of 240°C to 250°C, and a dwell time of 20-30 seconds. Avoid wave soldering or hand soldering.
  • Implement ESD protection devices, such as TVS diodes or ESD arrays, on the input and output lines. Ensure proper PCB layout and grounding to minimize ESD risk.
  • Use X7R or X5R ceramic capacitors with a minimum capacitance of 10uF and a voltage rating of 10V or higher. Ensure the capacitors are placed close to the device pins.

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Manufacturer Collaborated
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Community Approved
Sponsored

CPH5524-TL-E Overview

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