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CS5340-CZZR - Cirrus Logic

Description: IC ADC/AUDIO 24BIT 192K 16TSSOP

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CS5340-CZZR - Cirrus Logic PCB footprint - Small Outline Packages - Small Outline Packages - 16L TSSOP
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CS5340-CZZR - Cirrus Logic  - 3D model - Small Outline Packages - 16L TSSOP
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CS5340-CZZR Details

  • Manufacturer Part Number:

    CS5340-CZZR

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TSSOP

  • Package Description:

    4.40 MM, LEAD FREE, MO-153, TSSOP-16

  • Pin Count:

    16

  • HTS Code:

    8542.39.00.30

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

  • Analog Input Voltage-Max:

    5.95 V

  • Analog Input Voltage-Min:

    -0.7 V

  • Converter Type:

    ADC, DELTA-SIGMA

  • JESD-30 Code:

    R-PDSO-G16

  • JESD-609 Code:

    e3

  • Length:

    5 mm

  • Moisture Sensitivity Level:

    3

  • Number of Analog In Channels:

    2

  • Number of Bits:

    24

  • Number of Functions:

    1

  • Number of Terminals:

    16

  • Operating Temperature-Max:

    70 °C

  • Operating Temperature-Min:

    -10 °C

  • Output Bit Code:

    2'S COMPLEMENT BINARY

  • Output Format:

    SERIAL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Equivalence Code:

    TSSOP16,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Sample Rate:

    0.192 MHz

  • Seated Height-Max:

    1.1 mm

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Temperature Grade:

    COMMERCIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    4.4 mm

CS5340-CZZR Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply VDD first, followed by VCC, and then the analog power supplies (AVDD and DVDD). This ensures proper device operation and prevents latch-up.
  • To optimize ADC performance, ensure proper PCB layout, use a low-noise power supply, and optimize the analog input signal conditioning. Additionally, adjust the ADC clock frequency and sampling rate to suit your application's requirements.
  • The maximum allowed input signal amplitude is 2.5Vpp differential, which is the maximum rating for the device. Exceeding this amplitude may result in distortion, clipping, or even device damage.
  • The CS5340-CZZR outputs 24-bit data in a serial format. Ensure proper synchronization with the clock signal (SCLK) and frame signal (FSYNC) to correctly capture and process the output data.
  • The internal voltage reference (VREF) pin provides a stable voltage reference for the ADC. It can be used as a reference for external circuitry or as a voltage source for other components in the system.

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CS5340-CZZR Overview

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Part Image CS5340-CZ Cirrus Logic

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Part Image CS5340-DZ Cirrus Logic

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