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CS5341-CZZ - Cirrus Logic

Description: Cirrus Logic CS5341-CZZ, 24 bit Serial ADC, Dual, 16-Pin TSSOP

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CS5341-CZZ - Cirrus Logic - PCB symbol
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PCB Footprints
CS5341-CZZ - Cirrus Logic PCB footprint - Small Outline Packages - Small Outline Packages - 16L TSSOP
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CS5341-CZZ - Cirrus Logic - 3D model - Small Outline Packages - 16L TSSOP
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CS5341-CZZ Details

  • Manufacturer Part Number:

    CS5341-CZZ

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TSSOP

  • Pin Count:

    16

  • HTS Code:

    8542.39.00.30

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

  • Analog Input Voltage-Max:

    2.94 V

  • Converter Type:

    ADC, DELTA-SIGMA

  • JESD-30 Code:

    R-PDSO-G16

  • JESD-609 Code:

    e3

  • Length:

    5 mm

  • Moisture Sensitivity Level:

    3

  • Number of Analog In Channels:

    2

  • Number of Bits:

    24

  • Number of Functions:

    1

  • Number of Terminals:

    16

  • Operating Temperature-Max:

    70 °C

  • Operating Temperature-Min:

    -10 °C

  • Output Bit Code:

    2'S COMPLEMENT BINARY

  • Output Format:

    SERIAL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Equivalence Code:

    TSSOP16,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Sample Rate:

    0.192 MHz

  • Seated Height-Max:

    1.1 mm

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Temperature Grade:

    COMMERCIAL

  • Terminal Finish:

    MATTE TIN

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    4.4 mm

CS5341-CZZ Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply VDD first, followed by VCC, and then the analog power supplies (AVDD and DVDD). This ensures proper device operation and prevents latch-up.
  • The CS5341-CZZ can be configured for differential or single-ended analog input by setting the appropriate pins (AINP, AINN, and AINCM) and adjusting the internal gain settings. Refer to the datasheet for specific pin configurations and gain settings.
  • The maximum input signal amplitude for the CS5341-CZZ is ±2.5Vpp differential or ±5Vpp single-ended, depending on the gain setting and input configuration.
  • To optimize the CS5341-CZZ for low power consumption, use the power-down mode (PD pin), reduce the clock frequency, and adjust the internal bias currents. Additionally, consider using the device's built-in power-saving features, such as the auto-power-down mode.
  • The recommended clock frequency range for the CS5341-CZZ is 2.4 MHz to 50 MHz, with a typical frequency of 12.288 MHz for audio applications.

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CS5341-CZZ Overview

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CS5341-CZZ Alternates

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Part Image CS5341-CZ Cirrus Logic

ADC, Delta-Sigma, 24-Bit, 1 Func, 2 Channel, Serial Access, PDSO16
Part Image CS5341-DZZ Cirrus Logic

ADC, Delta-Sigma, 24-Bit, 1 Func, 2 Channel, Serial Access, PDSO16