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F3L100R07W2E3_B11 - Infineon

Description: IGBT Modules IGBT MODULES 650V 100A , 300W , 400nA , -40°C ~ +150°C

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F3L100R07W2E3_B11 - Infineon PCB footprint - Other - Other - F3L100R07W2E3_B11-1
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F3L100R07W2E3_B11 Details

  • Manufacturer Part Number:

    F3L100R07W2E3_B11

  • Pbfree Code:

    No

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    MODULE

  • Pin Count:

    34

  • Country Of Origin:

    Hungary, Mainland China, Malaysia, Thailand

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    5

  • Case Connection:

    ISOLATED

  • Collector Current-Max (IC):

    117 A

  • Collector-Emitter Voltage-Max:

    650 V

  • Configuration:

    COMPLEX

  • Gate-Emitter Voltage-Max:

    20 V

  • JESD-30 Code:

    R-XUFM-X14

  • Number of Elements:

    4

  • Number of Terminals:

    14

  • Operating Temperature-Max:

    175 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    300 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    NO

  • Terminal Form:

    UNSPECIFIED

  • Terminal Position:

    UPPER

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    345 ns

  • Turn-on Time-Nom (ton):

    95 ns

  • VCEsat-Max:

    1.9 V

F3L100R07W2E3_B11 Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the F3L100R07W2E3_B11 is -40°C to 150°C.
  • Proper cooling can be achieved by using a heat sink, ensuring good airflow, and avoiding thermal interface materials with high thermal resistance.
  • A recommended PCB layout for the F3L100R07W2E3_B11 includes a solid ground plane, short and wide traces for power and signal lines, and a decoupling capacitor near the device.
  • The power-up sequence should start with the enable pin, followed by the input voltage, and then the clock signal. The power-down sequence should be reversed.
  • Critical timing parameters include the clock frequency, input signal rise and fall times, and the enable pin setup and hold times.

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F3L100R07W2E3_B11 Overview

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