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FDD86252 - onsemi

Description: 100% UIL tested ; Max rDS(on) = 72 mΩ at VGS = 6 V, ID = 4 A ; Max rDS(on) = 52 mΩ at VGS = 10 V, ID = 5 A ; RoHS Compliant ; Shielded Gate MOSFET Technology

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FDD86252 - onsemi PCB footprint - Other - Other - DPAK3 CASE 369AK ISSUE O
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FDD86252 - onsemi  - 3D model - Other - DPAK3 CASE 369AK ISSUE O
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FDD86252 Details

  • Manufacturer Part Number:

    FDD86252

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    DPAK-3 / TO-252-3

  • Package Description:

    ROHS COMPLIANT, DPAK-3

  • Manufacturer Package Code:

    369AS

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    8 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    72 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    150 V

  • Drain Current-Max (ID):

    5 A

  • Drain-source On Resistance-Max:

    0.052 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-252

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    89 W

  • Pulsed Drain Current-Max (IDM):

    25 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

FDD86252 Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1 oz copper thickness and a thermal relief pattern under the device.
  • Ensure the input voltage (VIN) is within the recommended range (4.5V to 18V). Use a stable voltage regulator and decouple the input with a 10uF capacitor. Also, ensure the output voltage (VOUT) is within the recommended range (0.8V to 3.3V).
  • A 10uF to 22uF X5R or X7R ceramic capacitor is recommended for the input capacitor (CIN). This ensures low ESR and high ripple current capability.
  • Use a shielded inductor, keep the layout compact, and minimize loop areas. Ensure the device is placed close to the input capacitors and the output filter components. Use a common-mode choke or a ferrite bead to filter the output.
  • The maximum allowed junction temperature is 150°C. Ensure proper thermal design and heat sinking to keep the junction temperature below this limit.

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FDD86252 Overview

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