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FDD86369-F085 - onsemi

Description: Low RDS(on); Low QG and Capacitance; RoHS Compliant; AEC−Q101 Qualified and PPAP Capable

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FDD86369-F085 - onsemi PCB footprint - Other - Other - DPAK3 (TO−252 3 LD) CASE 369AS ISSUE O_3
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FDD86369-F085 - onsemi  - 3D model - Other - DPAK3 (TO−252 3 LD) CASE 369AS ISSUE O_3
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FDD86369-F085 Details

  • Manufacturer Part Number:

    FDD86369-F085

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-252 3L (DPAK)

  • Package Description:

    DPAK-3/2

  • Manufacturer Package Code:

    369AS

  • Reach Compliance Code:

    Not Compliant

  • Country Of Origin:

    Philippines

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    7

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-252AA

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    150 W

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

FDD86369-F085 Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1 oz copper thickness and a thermal relief pattern under the device.
  • Implement a robust thermal management system, including a heat sink, thermal interface material, and a cooling fan if necessary. Monitor junction temperature and adjust the system design accordingly.
  • Monitor the device's junction temperature, drain-source voltage, and current. Implement over-temperature, over-voltage, and over-current protection mechanisms to prevent damage.
  • Use a dedicated gate driver IC with a high current capability (>1A) and a low output impedance. Ensure a short gate trace length and a low inductance layout to minimize ringing and oscillations.
  • Implement ESD protection diodes (e.g., TVS or Zener diodes) on the drain and source pins. Use a PCB layout with a solid ground plane and a low-impedance path to ground for ESD discharge.

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FDD86369-F085 Overview

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Part Image FDD86369_F085 onsemi

80V, 90A, 5.9 mΩ, DPAK N-Channel PowerTrench®, TO-252 3L (DPAK), 5000-TAPE REEL