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FF150R12MS4G - Infineon

Description: IGBT Modules N-CH 1.2KV 225A

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FF150R12MS4G Details

  • Manufacturer Part Number:

    FF150R12MS4G

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    MODULE

  • Pin Count:

    11

  • Country Of Origin:

    Austria, Hungary

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    5

  • Case Connection:

    ISOLATED

  • Collector Current-Max (IC):

    225 A

  • Collector-Emitter Voltage-Max:

    1200 V

  • Configuration:

    SERIES CONNECTED, CENTER TAP, 2 ELEMENTS WITH BUILT-IN DIODE AND THERMISTOR

  • Gate-Emitter Voltage-Max:

    20 V

  • JESD-30 Code:

    R-XUFM-X11

  • Number of Elements:

    2

  • Number of Terminals:

    11

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    1250 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    NO

  • Terminal Form:

    UNSPECIFIED

  • Terminal Position:

    UPPER

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    590 ns

  • Turn-on Time-Nom (ton):

    180 ns

  • VCEsat-Max:

    3.7 V

FF150R12MS4G Frequently Asked Questions (FAQs)

  • The maximum allowed overload current is 150% of the nominal current (150 A) for a maximum of 1 second, with a maximum of 10 occurrences.
  • Proper thermal management can be achieved by ensuring good heat sink contact, using a suitable thermal interface material, and maintaining a maximum junction temperature of 150°C.
  • The recommended gate resistor value is between 10 Ω and 20 Ω, depending on the specific application and switching frequency.
  • Yes, the FF150R12MS4G can be used in a parallel configuration, but it's essential to ensure that the modules are properly matched, and the gate drive and control circuits are designed to handle the parallel configuration.
  • The maximum allowed voltage imbalance between the DC-link capacitors is ±5% of the nominal DC-link voltage.

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FF150R12MS4G Overview

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