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FF900R12IE4 - Infineon

Description: Trans IGBT Module N-CH 1.2KV 900A 10-pin PRIME2-1

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FF900R12IE4 - Infineon  - 3D model
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FF900R12IE4 Details

  • Manufacturer Part Number:

    FF900R12IE4

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    MODULE

  • Pin Count:

    11

  • Country Of Origin:

    Germany

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    5

  • Case Connection:

    ISOLATED

  • Collector Current-Max (IC):

    900 A

  • Collector-Emitter Voltage-Max:

    1200 V

  • Configuration:

    SERIES CONNECTED, CENTER TAP, 2 ELEMENTS WITH BUILT-IN DIODE AND THERMISTOR

  • Gate-Emitter Voltage-Max:

    20 V

  • JESD-30 Code:

    R-XUFM-X7

  • Number of Elements:

    2

  • Number of Terminals:

    7

  • Operating Temperature-Max:

    175 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    5100 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    NO

  • Terminal Form:

    UNSPECIFIED

  • Terminal Position:

    UPPER

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    940 ns

  • Turn-on Time-Nom (ton):

    350 ns

  • VCEsat-Max:

    2.05 V

FF900R12IE4 Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the FF900R12IE4 is -40°C to 150°C.
  • To ensure reliability, follow the recommended operating conditions, use a suitable heat sink, and ensure proper thermal management. Additionally, consider using a gate driver with a high current capability and a short-circuit protection feature.
  • The recommended gate resistance for the FF900R12IE4 is between 1 ohm and 10 ohm, depending on the specific application and switching frequency.
  • Yes, the FF900R12IE4 can be used in a parallel configuration to increase current handling. However, it's essential to ensure that the devices are properly matched, and the gate drive and layout are designed to minimize current imbalance and oscillations.
  • To minimize EMI, use a layout with a solid ground plane, keep the power loops small, and use shielding or filtering if necessary. Additionally, consider using a gate driver with built-in EMI filtering or a common-mode choke.

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FF900R12IE4 Overview

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