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GAL16V8D-7LP - Lattice Semiconductor

Description: SPLD GAL Family 8 Macro Cells 125MHz 5V 20-Pin PDIP

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GAL16V8D-7LP - Lattice Semiconductor PCB footprint - Dual-In-Line Packages - Dual-In-Line Packages - DIP-20
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3D Models
GAL16V8D-7LP - Lattice Semiconductor  - 3D model - Dual-In-Line Packages - DIP-20
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GAL16V8D-7LP Details

  • Manufacturer Part Number:

    GAL16V8D-7LP

  • Pbfree Code:

    No

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    DIP

  • Package Description:

    PLASTIC, DIP-20

  • Pin Count:

    20

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    0

  • Additional Feature:

    PROGRAMMABLE OUTPUT POLARITY

  • Architecture:

    PAL-TYPE

  • Clock Frequency-Max:

    100 MHz

  • JESD-30 Code:

    R-PDIP-T20

  • JESD-609 Code:

    e0

  • Length:

    26.162 mm

  • Number of Dedicated Inputs:

    8

  • Number of I/O Lines:

    8

  • Number of Inputs:

    18

  • Number of Outputs:

    8

  • Number of Product Terms:

    64

  • Number of Terminals:

    20

  • Operating Temperature-Max:

    70 °C

  • Organization:

    8 DEDICATED INPUTS, 8 I/O

  • Output Function:

    MACROCELL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    DIP

  • Package Equivalence Code:

    DIP20,.3

  • Package Shape:

    RECTANGULAR

  • Package Style:

    IN-LINE

  • Peak Reflow Temperature (Cel):

    225

  • Programmable Logic Type:

    EE PLD

  • Propagation Delay:

    7.5 ns

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    5.334 mm

  • Supply Voltage-Max:

    5.25 V

  • Supply Voltage-Min:

    4.75 V

  • Supply Voltage-Nom:

    5 V

  • Surface Mount:

    NO

  • Technology:

    CMOS

  • Temperature Grade:

    COMMERCIAL

  • Terminal Finish:

    Tin/Lead (Sn/Pb)

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Pitch:

    2.54 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    7.62 mm

GAL16V8D-7LP Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the GAL16V8D-7LP is 150 MHz.
  • The GAL16V8D-7LP can be programmed using a variety of methods, including JTAG, ISP, and parallel programming. Lattice Semiconductor provides software tools such as ispLEVER and Diamond for programming and configuring the device.
  • The power consumption of the GAL16V8D-7LP depends on the operating frequency and the specific application. However, the typical power consumption is around 100-200 mW at 5V and 100 MHz.
  • Yes, the GAL16V8D-7LP is compatible with 3.3V systems. However, the device's input and output voltage levels must be adjusted accordingly to ensure proper operation.
  • The GAL16V8D-7LP has a built-in clock divider that can be used to divide the input clock frequency. The clock divider can be configured using the device's programming software.

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GAL16V8D-7LP Overview

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Part Image GAL16V8D-7LD/883 Lattice Semiconductor Corporation

EE PLD, 7.5ns, PAL-Type, CMOS, CDIP20

Part Image 5962-8983907RA Lattice Semiconductor Corporation

EE PLD, 7.5ns, PAL-Type, CMOS, CDIP20

Part Image GAL16V8D-7LPNI Lattice Semiconductor Corporation

EE PLD, 7.5ns, PAL-Type, CMOS, PDIP20

Part Image GAL16V8D-7LPN Lattice Semiconductor Corporation

EE PLD, 7.5ns, PAL-Type, CMOS, PDIP20

Part Image GAL16V8C-7LD/883 Lattice Semiconductor Corporation

EE PLD, 9ns, PAL-Type, CMOS, CDIP20

For a full list of alternate parts for GAL16V8D-7LP, check out Findchips.com