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IGW40N65F5 - Infineon

Description: Infineon IGW40N65F5, IGBT Transistor, 40 A Dual 650 V, 3-Pin PG-TO-247

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IGW40N65F5 - Infineon PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - PG-TO247-3-44
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3D Models
IGW40N65F5 - Infineon  - 3D model - Transistor Outline, Vertical - PG-TO247-3-44
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IGW40N65F5 Details

  • Manufacturer Part Number:

    IGW40N65F5

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Country Of Origin:

    Germany, Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    5

  • Case Connection:

    COLLECTOR

  • Collector Current-Max (IC):

    74 A

  • Collector-Emitter Voltage-Max:

    650 V

  • Configuration:

    SINGLE

  • Gate-Emitter Thr Voltage-Max:

    4.8 V

  • Gate-Emitter Voltage-Max:

    20 V

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    250 W

  • Surface Mount:

    NO

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    200 ns

  • Turn-on Time-Nom (ton):

    34 ns

  • VCEsat-Max:

    2.1 V

IGW40N65F5 Frequently Asked Questions (FAQs)

  • The maximum junction temperature (Tj) of the IGW40N65F5 is 175°C, as specified in the datasheet. However, it's recommended to keep the junction temperature below 150°C for reliable operation and to prevent thermal runaway.
  • To ensure proper cooling, a heat sink with a thermal resistance of less than 1°C/W is recommended. The heat sink should be mounted to the device using a thermal interface material (TIM) with a thermal conductivity of at least 1 W/mK. Additionally, ensure good airflow around the heat sink to dissipate heat efficiently.
  • The recommended gate drive voltage for the IGW40N65F5 is between 10V and 15V. A higher gate drive voltage can reduce switching losses, but may also increase the risk of gate oxide breakdown. A lower gate drive voltage can reduce the risk of gate oxide breakdown, but may increase switching losses.
  • To protect the IGW40N65F5 from overvoltage and overcurrent, use a voltage clamp or a transient voltage suppressor (TVS) to limit the voltage across the device. Additionally, use a current sense resistor and a fast-acting fuse or a current limiter to detect and respond to overcurrent conditions.
  • The recommended PCB layout for the IGW40N65F5 involves using a multi-layer PCB with a solid ground plane and a separate power plane. Keep the power traces short and wide, and use a Kelvin connection for the gate driver to minimize inductance. Also, ensure that the PCB is designed to minimize thermal resistance and to provide good heat dissipation.

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