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IKW50N120CH7XKSA1 - Infineon

Description: IGBTs 1200 V, 50 A IGBT with anti-parallel diode in TO-247 3pin package

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IKW50N120CH7XKSA1 - Infineon PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - PG-TO-247-3
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3D Models
IKW50N120CH7XKSA1 - Infineon  - 3D model - Transistor Outline, Vertical - PG-TO-247-3
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IKW50N120CH7XKSA1 Details

  • Manufacturer Part Number:

    IKW50N120CH7XKSA1

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    19 Weeks

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    5

  • Collector Current-Max (IC):

    86 A

  • Collector-Emitter Voltage-Max:

    1200 V

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • Gate-Emitter Thr Voltage-Max:

    6.2 V

  • Gate-Emitter Voltage-Max:

    20 V

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    398 W

  • Surface Mount:

    NO

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    360 ns

  • Turn-on Time-Nom (ton):

    66 ns

  • VCEsat-Max:

    2.15 V

IKW50N120CH7XKSA1 Frequently Asked Questions (FAQs)

  • The maximum junction temperature for the IKW50N120CH7XKSA1 is 150°C, as specified in the datasheet. However, it's recommended to operate the device at a lower temperature to ensure reliability and longevity.
  • Proper cooling is crucial for the IKW50N120CH7XKSA1. Ensure good thermal contact between the device and the heat sink, and use a heat sink with a thermal resistance of less than 1 K/W. Also, consider using a thermal interface material to fill any gaps between the device and heat sink.
  • The recommended gate drive voltage for the IKW50N120CH7XKSA1 is between 10V and 15V. However, the optimal gate drive voltage may vary depending on the specific application and switching frequency. Consult the datasheet and application notes for more information.
  • Yes, the IKW50N120CH7XKSA1 can be used in a parallel configuration to increase the overall current handling capability. However, it's essential to ensure that the devices are properly matched and that the gate drive signals are synchronized to prevent uneven current sharing.
  • The recommended PCB layout for the IKW50N120CH7XKSA1 involves using a symmetrical layout with short, wide traces for the power connections. Keep the gate drive traces separate from the power traces to minimize noise and ensure proper operation. Consult the datasheet and application notes for more information.

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IKW50N120CH7XKSA1 Overview

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