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IPB026N06NATMA1 - Infineon

Description: N-Channel 60 V 25A (Ta), 100A (Tc) 3W (Ta), 136W (Tc) Surface Mount PG-TO263-3

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PCB Footprints
IPB026N06NATMA1 - Infineon PCB footprint - Other - Other - PG-TO263-3_2023
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IPB026N06NATMA1 Details

  • Manufacturer Part Number:

    IPB026N06NATMA1

  • Pbfree Code:

    No

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    D2PAK

  • Pin Count:

    4

  • Country Of Origin:

    Austria, Germany, Malaysia, Mexico

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    18 Weeks

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    110 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    60 V

  • Drain Current-Max (ID):

    25 A

  • Drain-source On Resistance-Max:

    0.0026 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-263AB

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Polarity/Channel Type:

    N-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    400 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

IPB026N06NATMA1 Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for IPB026N06NATMA1 is -55°C to 175°C.
  • To minimize switching losses, ensure the gate drive voltage is sufficient (typically 10-15V), and the gate resistance is minimized (e.g., using a low-impedance gate driver).
  • Use a compact, symmetrical layout with short, wide traces for the drain, source, and gate connections. Minimize loop areas and use a solid ground plane to reduce parasitic inductance.
  • Use a voltage clamp or TVS diode to protect against overvoltage, and consider adding a current sense resistor and overcurrent protection circuitry to prevent damage from excessive current.
  • Ensure good thermal contact between the MOSFET and a heat sink or PCB, and consider using thermal interface materials to minimize thermal resistance. Also, ensure adequate airflow or use a fan to dissipate heat.

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IPB026N06NATMA1 Overview

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