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IPD70P04P4-09 - Infineon

Description: -40V, P-Ch, 8.9 mΩ max, Automotive MOSFET, DPAK, OptiMOS™-P2

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PCB Footprints
IPD70P04P4-09 - Infineon PCB footprint - Other - Other - PG-TO252-3_2024
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IPD70P04P4-09 Details

  • Manufacturer Part Number:

    IPD70P04P4-09

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-252

  • Package Description:

    GREEN, PLASTIC PACKAGE-3

  • Pin Count:

    4

  • Country Of Origin:

    Austria, Malaysia

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    5

  • Avalanche Energy Rating (Eas):

    24 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    73 A

  • Drain-source On Resistance-Max:

    0.0089 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-252

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    75 W

  • Pulsed Drain Current-Max (IDM):

    292 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Transistor Element Material:

    SILICON

IPD70P04P4-09 Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. The device should be placed near a heat sink or a thermal pad to dissipate heat efficiently.
  • The device requires a stable input voltage (VIN) and a proper biasing of the gate-source voltage (VGS) to ensure optimal performance. A voltage regulator and a voltage divider can be used to achieve this.
  • Handle the device in an ESD-protected environment, wear an ESD strap, and use ESD-safe tools and materials to prevent damage. Avoid touching the device's pins or handling it in a way that could generate static electricity.
  • The maximum current rating depends on the device's thermal performance, PCB layout, and cooling system. Use the device's thermal resistance (Rth) and the maximum junction temperature (Tj) to calculate the maximum current rating for your specific application.
  • When paralleling multiple devices, ensure that each device has an identical PCB layout, thermal management, and biasing. Use a common gate driver and ensure that the devices are properly synchronized to prevent current imbalance and oscillations.

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IPD70P04P4-09 Overview

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