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LC4064ZE-5MN64I - Lattice Semiconductor

Description: CPLD - Complex Programmable Logic Devices 64MC 48 I/O Low Pwr 1.8V 5.8NS

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PCB Footprints
LC4064ZE-5MN64I - Lattice Semiconductor PCB footprint - BGA - BGA - 64-Ball csBGA
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LC4064ZE-5MN64I - Lattice Semiconductor  - 3D model - BGA - 64-Ball csBGA
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LC4064ZE-5MN64I Details

  • Manufacturer Part Number:

    LC4064ZE-5MN64I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    BGA

  • Package Description:

    5 X 5 MM, 0.5 MM PITCH, LEAD FREE, CSBGA-64

  • Pin Count:

    64

  • Country Of Origin:

    Malaysia, Taiwan

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    5

  • Additional Feature:

    YES

  • Clock Frequency-Max:

    149 MHz

  • In-System Programmable:

    YES

  • JESD-30 Code:

    S-PBGA-B64

  • JESD-609 Code:

    e1

  • JTAG BST:

    YES

  • Length:

    5 mm

  • Moisture Sensitivity Level:

    3

  • Number of Dedicated Inputs:

    4

  • Number of I/O Lines:

    48

  • Number of Inputs:

    52

  • Number of Macro Cells:

    64

  • Number of Outputs:

    48

  • Number of Terminals:

    64

  • Operating Temperature-Max:

    105 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    4 DEDICATED INPUTS, 48 I/O

  • Output Function:

    MACROCELL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TFBGA

  • Package Equivalence Code:

    BGA64,8X8,20

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, THIN PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    EE PLD

  • Propagation Delay:

    5.8 ns

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.1 mm

  • Supply Voltage-Max:

    1.9 V

  • Supply Voltage-Min:

    1.7 V

  • Supply Voltage-Nom:

    1.8 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Finish:

    TIN SILVER COPPER

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Width:

    5 mm

LC4064ZE-5MN64I Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply VCCIO first, followed by VCC, and then the input signals. This ensures that the device powers up correctly and minimizes the risk of latch-up or damage.
  • The LC4064ZE-5MN64I has a built-in clock tree that can be used to distribute clock signals to different parts of the design. To implement a clock tree, use the Clock Wizard tool in the Lattice Diamond software to generate a clock tree that meets your specific requirements.
  • The maximum frequency that the LC4064ZE-5MN64I can operate at depends on the specific application and the clock frequency of the design. However, the device is typically specified to operate at frequencies up to 150 MHz.
  • To optimize power consumption, use the Power Calculator tool in the Lattice Diamond software to estimate power consumption and identify areas for optimization. Additionally, use power-saving features such as clock gating, power gating, and dynamic voltage and frequency scaling to reduce power consumption.
  • The main difference between the two devices is the speed grade. The LC4064ZE-5MN64I has a speed grade of -5, which means it has a maximum clock frequency of 100 MHz, while the LC4064ZE-7MN64I has a speed grade of -7, which means it has a maximum clock frequency of 150 MHz.

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LC4064ZE-5MN64I Overview

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