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LFE2-20E-5FN484C - Lattice Semiconductor

Description: LATTICE SEMICONDUCTOR - LFE2-20E-5FN484C - FPGA, 21K LUTS, 331 I/O, DSP, 484FPBGA

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PCB Footprints
LFE2-20E-5FN484C - Lattice Semiconductor PCB footprint - BGA - BGA - 484-Ball fpBGA
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3D Models
LFE2-20E-5FN484C - Lattice Semiconductor  - 3D model - BGA - 484-Ball fpBGA
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LFE2-20E-5FN484C Details

  • Manufacturer Part Number:

    LFE2-20E-5FN484C

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    BGA

  • Package Description:

    FPBGA-484

  • Pin Count:

    484

  • Country Of Origin:

    Malaysia, Taiwan

  • ECCN Code:

    3A991.D

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    9

  • Clock Frequency-Max:

    311 MHz

  • Combinatorial Delay of a CLB-Max:

    0.358 ns

  • JESD-30 Code:

    S-PBGA-B484

  • JESD-609 Code:

    e1

  • Length:

    23 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    2625

  • Number of Inputs:

    331

  • Number of Logic Cells:

    20000

  • Number of Outputs:

    331

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    85 °C

  • Organization:

    2625 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA484,22X22,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    23 mm

LFE2-20E-5FN484C Frequently Asked Questions (FAQs)

  • The LFE2-20E-5FN484C FPGA has an operating temperature range of -40°C to 100°C.
  • You can implement a clock tree using the FPGA's built-in clock management unit (CMU) and the ispLEVER Classic or Diamond design software. The CMU provides a flexible clocking architecture that allows you to generate and distribute clocks throughout the device.
  • The maximum frequency of the PLL in the LFE2-20E-5FN484C FPGA is 500 MHz.
  • You can configure the I/O banks using the FPGA's I/O editor in the Diamond design software. The I/O editor allows you to specify the I/O standard, voltage, and slew rate for each bank.
  • The power consumption of the LFE2-20E-5FN484C FPGA depends on the specific application and operating conditions. However, the typical power consumption is around 1.2W at 1.2V and 25°C.

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LFE2-20E-5FN484C Overview

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Part Image LFE2-20E-5F484C Lattice Semiconductor Corporation

Field Programmable Gate Array, 2625 CLBS, 311MHz, 20000-Cell, PBGA484