Part Image

LFE2-50SE-7FN672C - Lattice Semiconductor

Description: FPGA - Field Programmable Gate Array 48K LUTs S-Series 1.1.2V -7 Spd

Download LFE2-50SE-7FN672C Model
Schematic
symbols
Schematic symbol is unavailable for download
PCB
footprints
PCB footprint is unavailable for download
3D
models
3D model is unavailable for download
PCB Footprints
LFE2-50SE-7FN672C - Lattice Semiconductor PCB footprint - BGA - BGA - 672-Ball fpBGA
click to zoom
3D Models
LFE2-50SE-7FN672C - Lattice Semiconductor  - 3D model - BGA - 672-Ball fpBGA
click to zoom

LFE2-50SE-7FN672C Details

  • Manufacturer Part Number:

    LFE2-50SE-7FN672C

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    BGA

  • Package Description:

    FPBGA-672

  • Pin Count:

    672

  • Country Of Origin:

    Malaysia, Taiwan

  • ECCN Code:

    3A991.D

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    9

  • Clock Frequency-Max:

    420 MHz

  • Combinatorial Delay of a CLB-Max:

    0.304 ns

  • JESD-30 Code:

    S-PBGA-B672

  • JESD-609 Code:

    e1

  • Length:

    27 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    6000

  • Number of Inputs:

    500

  • Number of Logic Cells:

    50000

  • Number of Outputs:

    500

  • Number of Terminals:

    672

  • Operating Temperature-Max:

    85 °C

  • Organization:

    6000 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA672,26X26,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    27 mm

Trust Checks

This model has been provided by community users.
Community Provided
This model has been verified by system checks.
System Verified
This model has been reviewed by community users.
Community Approved
Sponsored

LFE2-50SE-7FN672C Overview

Use the download button to access the LFE2-50SE-7FN672C schematic symbol, PCB footprint, and 3D model.
To find more CAD model downloads similar to this part, try a partial part number search, like LFE2-, or try a keyword search, such as Field Programmable Gate Arrays

Parts related to LFE2-50SE-7FN672C

Showing 0 results