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LFE2M35E-5FN484C - Lattice Semiconductor

Description: Lattice FPGA LFE2M35E-5FN484C, ECP2M 34000 Cells, 72704bit, 34000 Blocks, 484-Pin FBGA

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PCB Footprints
LFE2M35E-5FN484C - Lattice Semiconductor PCB footprint - BGA - BGA - 484-Ball fpBGA
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3D Models
LFE2M35E-5FN484C - Lattice Semiconductor  - 3D model - BGA - 484-Ball fpBGA
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LFE2M35E-5FN484C Details

  • Manufacturer Part Number:

    LFE2M35E-5FN484C

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    BGA

  • Package Description:

    FPBGA-484

  • Pin Count:

    484

  • Country Of Origin:

    Malaysia, Taiwan

  • ECCN Code:

    3A991.D

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Lattice Semiconductor Corporation

  • YTEOL:

    9

  • Clock Frequency-Max:

    311 MHz

  • Combinatorial Delay of a CLB-Max:

    0.358 ns

  • JESD-30 Code:

    S-PBGA-B484

  • JESD-609 Code:

    e1

  • Length:

    23 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    4250

  • Number of Inputs:

    303

  • Number of Logic Cells:

    35000

  • Number of Outputs:

    303

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    85 °C

  • Organization:

    4250 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA484,22X22,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    23 mm

LFE2M35E-5FN484C Frequently Asked Questions (FAQs)

  • The LFE2M35E-5FN484C has an operating temperature range of -40°C to 100°C.
  • You can implement a clock tree using the FPGA's dedicated clock networks, which include global clock networks and regional clock networks. You can also use the ispLEVER Classic or Lattice Radiant software to help you design and implement the clock tree.
  • The maximum frequency achievable with the LFE2M35E-5FN484C depends on the specific design and implementation. However, the FPGA has a maximum clock frequency of 500 MHz.
  • You can configure the FPGA's I/O banks using the ispLEVER Classic or Lattice Radiant software. You can also use the FPGA's built-in I/O configuration registers to dynamically configure the I/O banks.
  • The power consumption of the LFE2M35E-5FN484C depends on the specific design and implementation. However, the FPGA has a typical static power consumption of 100 mW and a dynamic power consumption of 100 mW/MHz.

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LFE2M35E-5FN484C Overview

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Part Image LFE2M35E-5F484C Lattice Semiconductor Corporation

Field Programmable Gate Array, 4250 CLBS, 311MHz, 35000-Cell, PBGA484

Part Image LFE2M35E-5F484I Lattice Semiconductor Corporation

Field Programmable Gate Array, 4250 CLBS, 311MHz, 35000-Cell, PBGA484