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M2S090-1FGG484 - Microchip

Description: ARM® Cortex®-M3 System On Chip (SOC) IC SmartFusion®2 FPGA - 90K Logic Modules 166MHz 484-FPBGA (23x23)

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M2S090-1FGG484 Details

  • Manufacturer Part Number:

    M2S090-1FGG484

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    FBGA-484

  • Pin Count:

    484

  • Manufacturer Package Code:

    PBGA-484

  • Country Of Origin:

    South Korea

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Microchip Technology Inc

  • YTEOL:

    22

  • JESD-30 Code:

    S-PBGA-B484

  • JESD-609 Code:

    e1

  • Length:

    23 mm

  • Moisture Sensitivity Level:

    3

  • Number of Inputs:

    267

  • Number of Logic Cells:

    86184

  • Number of Outputs:

    267

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    85 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA484,22X22,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FPGA SOC

  • Seated Height-Max:

    2.44 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    65 nm

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Width:

    23 mm

M2S090-1FGG484 Frequently Asked Questions (FAQs)

  • Microchip provides a reference design guide and layout recommendations in the M2S090-1FGG484 user guide and PCB design files, which can be found on the Microchip website. It's essential to follow these guidelines to ensure optimal performance, signal integrity, and thermal management.
  • The M2S090-1FGG484 has a built-in voltage regulator, but it's recommended to use an external voltage regulator to ensure stable and efficient power supply. Microchip provides power management guidelines and recommendations for voltage regulators in the user guide and application notes.
  • The M2S090-1FGG484 has a thermal design power (TDP) of 12W. To prevent overheating, ensure good airflow, use a heat sink, and follow Microchip's thermal management guidelines in the user guide. Additionally, implement power-saving techniques, such as clock gating and dynamic voltage and frequency scaling, to reduce power consumption.
  • The M2S090-1FGG484 can be programmed using Microchip's Libero SoC Design Suite, which provides a comprehensive development environment for designing, implementing, and debugging FPGA-based systems. The Libero SoC Design Suite includes a FPGA compiler, simulator, and debugger, as well as a software development kit (SDK) for programming the FPGA.
  • Microchip offers several development boards and kits for the M2S090-1FGG484, including the M2S090-FG484-EVAL-KIT, which provides a comprehensive development platform for evaluating and prototyping FPGA-based designs. These boards and kits typically include the FPGA, memory, peripherals, and interfaces, as well as software and documentation to get started with development.

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M2S090-1FGG484 Overview

Use the download button to access the M2S090-1FGG484 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
To find more CAD model downloads similar to this part, try a partial part number search, like M2S09, or try a keyword search, such as Field Programmable Gate Arrays

About Microchip

Microchip Technology Inc. is a leading manufacturer of microcontrollers and semiconductor devices for a wide range of applications in the aerospace, automotive, consumer electronics, industrial, and medical industries. Alongside a comprehensive product portfolio, Microchip Technology Inc. also provides easy-to-use development tools that enable engineers to create optimal designs quickly with minimal iterations to reduce risk while lowering total system costs to market. Headquartered in Chandler, Arizona, th

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