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NIS5135MN1TXG - onsemi

Description: • Integrated Power Device • Power Device Thermally Protected • No External Current Shunt Required • 68 m Typical • Internal Charge Pump • Internal Undervoltage Lockout Circuit • Internal Overvoltage Clamp

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PCB Footprints
NIS5135MN1TXG - onsemi PCB footprint - Small Outline No-lead - Small Outline No-lead - DFN10, 3x3, 0.5P CASE 485C ISSUE F
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3D Models
NIS5135MN1TXG - onsemi  - 3D model - Small Outline No-lead - DFN10, 3x3, 0.5P CASE 485C ISSUE F
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NIS5135MN1TXG Details

  • Manufacturer Part Number:

    NIS5135MN1TXG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Not Recommended

  • Part Package Code:

    DFN10, 3x3, 0.5P

  • Pin Count:

    10

  • Manufacturer Package Code:

    485C

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Factory Lead Time:

    17 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    3

  • Adjustable Threshold:

    NO

  • Analog IC - Other Type:

    eFUSE

  • JESD-30 Code:

    S-XDSO-N10

  • JESD-609 Code:

    e3

  • Length:

    3 mm

  • Moisture Sensitivity Level:

    1

  • Number of Channels:

    1

  • Number of Functions:

    1

  • Number of Terminals:

    10

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    VSON

  • Package Equivalence Code:

    SOLCC10,.12,20

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE, VERY THIN PROFILE

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1 mm

  • Supply Voltage-Max (Vsup):

    10 V

  • Supply Voltage-Nom (Vsup):

    5 V

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    3 mm

NIS5135MN1TXG Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. The device should be placed near a thermal pad or heat sink to dissipate heat efficiently.
  • Ensure proper heat sinking, use a thermal interface material, and follow the recommended PCB layout. Also, consider derating the device's power dissipation at high temperatures.
  • A 10uF to 22uF X7R or X5R ceramic capacitor is recommended for input decoupling. The capacitor should be placed close to the device's input pins.
  • Use a shielded inductor, keep the layout compact, and minimize loop areas. Also, consider adding EMI filters or common-mode chokes to reduce emissions.
  • A 10uF to 22uF X7R or X5R ceramic capacitor is recommended for output filtering. The capacitor should be placed close to the device's output pins.

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NIS5135MN1TXG Overview

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