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NTHL099N60S5 - onsemi

Description: Ultra Low Gate Charge (Typ. Qg= 48 nC); Low Time Related Output Capacitance (Typ. Coss(tr.)= 642 pF); Optimized Capacitance; 650 V @ TJ = 150°C; Typ. RDS(on) = 79.2 m Ω; 100% Avalanche Tested; RoHS Compliant; Internal Gate Resistance: 6.9 Ω

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NTHL099N60S5 Details

  • Manufacturer Part Number:

    NTHL099N60S5

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-247-3LD

  • Manufacturer Package Code:

    340CX

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    18 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    232 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    600 V

  • Drain Current-Max (ID):

    33 A

  • Drain-source On Resistance-Max:

    0.099 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    184 W

  • Pulsed Drain Current-Max (IDM):

    95 A

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

NTHL099N60S5 Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves using a thermal pad on the bottom of the device, connecting it to a large copper area on the PCB, and using multiple vias to dissipate heat to the other layers. A minimum of 2oz copper thickness is recommended.
  • To ensure reliable operation at high temperatures, it's essential to follow the recommended derating curves, ensure good thermal design, and avoid exceeding the maximum junction temperature (Tj) of 175°C. Additionally, consider using a thermal interface material (TIM) to improve heat transfer between the device and the heat sink.
  • The NTHL099N60S5 has an integrated ESD protection diode, but it's still recommended to follow standard ESD handling procedures during assembly and testing. A human body model (HBM) of 2kV and a machine model (MM) of 200V are recommended for ESD protection.
  • Yes, you can use multiple NTHL099N60S5 devices in parallel to increase current handling, but it's crucial to ensure that the devices are properly matched and that the gate drive signals are synchronized to prevent uneven current sharing.
  • The recommended gate drive voltage is 10-15V, and the recommended gate current is 1-2A. A gate driver with a high current capability and a low output impedance is recommended to ensure fast switching times and low losses.

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NTHL099N60S5 Overview

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