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NVMFS5C404NLWFAFT1G - onsemi

Description: Small Footprint (5x6 mm); Low RDS(on); NVMFS5C404NLWF − Wettable Flank Option; Low QG and Capacitance; AEC−Q101 Qualified and PPAP Capable; RoHS Compliant

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NVMFS5C404NLWFAFT1G Details

  • Manufacturer Part Number:

    NVMFS5C404NLWFAFT1G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    DFNW5 4.90x5.90x1.00, 1.27P

  • Manufacturer Package Code:

    507BE

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • Date Of Intro:

    2017-02-24

  • Manufacturer:

    onsemi

  • YTEOL:

    5.6

  • Avalanche Energy Rating (Eas):

    907 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    370 A

  • Drain-source On Resistance-Max:

    0.001 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    79.8 pF

  • JESD-30 Code:

    R-PDSO-F5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    200 W

  • Pulsed Drain Current-Max (IDM):

    900 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

NVMFS5C404NLWFAFT1G Frequently Asked Questions (FAQs)

  • The recommended operating temperature range for NVMFS5C404NLWFAFT1G is -40°C to 125°C.
  • To ensure data integrity and prevent data corruption during power cycling, it is recommended to use a voltage supervisor or a power-on reset circuit to ensure that the device is fully powered up before accessing the memory.
  • The NVMFS5C404NLWFAFT1G supports up to 100,000 erase cycles.
  • The NVMFS5C404NLWFAFT1G uses a page-based architecture, where each page is 528 bytes. The device has 2048 pages, divided into 128 blocks. The user needs to manage page and block allocation, wear leveling, and bad block management to ensure optimal performance and reliability.
  • The typical programming time for NVMFS5C404NLWFAFT1G is 2-3 ms per page.

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NVMFS5C404NLWFAFT1G Overview

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For a full list of alternate parts for NVMFS5C404NLWFAFT1G, check out Findchips.com