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PDTC123EU,115 - Nexperia

Description: NPN resistor-equipped transistor; R1 = 2.2 kΩ, R2 = 10 kΩ

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PCB Footprints
PDTC123EU,115 - Nexperia PCB footprint - SOT23 (3-Pin) - SOT23 (3-Pin) - SC-70 (SOT323)-2
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3D Models
PDTC123EU,115 - Nexperia  - 3D model - SOT23 (3-Pin) - SC-70 (SOT323)-2
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PDTC123EU,115 Details

  • Manufacturer Part Number:

    PDTC123EU,115

  • Brand Name:

    Nexperia

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    SC-70

  • Package Description:

    PLASTIC, SC-70, 3 PIN

  • Pin Count:

    3

  • Manufacturer Package Code:

    SOT323

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    8 Weeks

  • Manufacturer:

    Nexperia

  • YTEOL:

    7

  • Additional Feature:

    BUILT-IN BIAS RESISTOR RATIO IS 1

  • Collector Current-Max (IC):

    0.1 A

  • Collector-Emitter Voltage-Max:

    50 V

  • Configuration:

    SINGLE WITH BUILT-IN RESISTOR

  • DC Current Gain-Min (hFE):

    30

  • JESD-30 Code:

    R-PDSO-G3

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    NPN

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    TIN

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

PDTC123EU,115 Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for PDTC123EU,115 is a standard SOT23 package with a 1.3 mm x 1.3 mm body size and a 0.5 mm lead pitch. A minimum pad size of 1.1 mm x 1.1 mm is recommended for reliable soldering.
  • To ensure reliable operation of PDTC123EU,115 in high-temperature environments, it is recommended to follow proper thermal management practices, such as providing adequate heat sinking, using thermal interface materials, and ensuring good airflow. Additionally, the device should be operated within its specified temperature range of -40°C to 150°C.
  • The maximum allowed voltage on the input pins of PDTC123EU,115 is 6.5 V. Exceeding this voltage may cause damage to the device or affect its reliability.
  • Yes, PDTC123EU,115 can be used in high-frequency applications up to 100 kHz. However, it is essential to follow proper PCB design and layout practices to minimize parasitic inductance and capacitance, which can affect the device's performance at high frequencies.
  • To handle ESD protection when working with PDTC123EU,115, it is recommended to follow standard ESD handling practices, such as using ESD-safe workstations, wearing ESD-protective clothing, and using ESD-protective packaging materials. Additionally, the device should be handled by the body, not the leads, to prevent damage.

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PDTC123EU,115 Overview

Use the download button to access the PDTC123EU,115 schematic symbol, PCB footprint, and 3D model.
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About Nexperia

Nexperia is a leading global player in the semiconductor industry. Specializing in essential electronic components, Nexperia offers a diverse range of products including discrete components, MOSFETs, logic ICs, and analog ICs. These components are integral to a multitude of applications across automotive, industrial, consumer electronics, and computing sectors, where reliability, performance, and efficiency are paramount.

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