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R5F21335CNFP#V2 - Renesas Electronics

Description: The R8C/33C Group is supported only for customers who have already adopted these products.The R8C/33C Group of single-chip MCUs incorporates the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1Mb of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.Power consumption is low, and the supported operating modes allow additional power control. These MCUs are designed

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R5F21335CNFP#V2 - Renesas Electronics - PCB symbol
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R5F21335CNFP#V2 - Renesas Electronics PCB footprint - Quad Flat Packages - Quad Flat Packages - PLQP0032GB-A
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R5F21335CNFP#V2 - Renesas Electronics - 3D model - Quad Flat Packages - PLQP0032GB-A
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R5F21335CNFP#V2 Details

  • Manufacturer Part Number:

    R5F21335CNFP#V2

  • Brand Name:

    Renesas

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    LQFP

  • Pin Count:

    32

  • Manufacturer Package Code:

    PLQP0032GB

  • HTS Code:

    8542.31.00.20

  • Manufacturer:

    Renesas Electronics Corporation

  • YTEOL:

    0

  • Bit Size:

    16

  • CPU Family:

    R8C

  • JESD-30 Code:

    S-PQFP-G32

  • Number of Terminals:

    32

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -20 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    QFP

  • Package Equivalence Code:

    QFP32,.35SQ,32

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK

  • Qualification Status:

    Not Qualified

  • RAM (bytes):

    2048

  • ROM (words):

    24576

  • ROM Programmability:

    FLASH

  • Speed:

    20 MHz

  • Supply Current-Max:

    15 mA

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    OTHER

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    QUAD

R5F21335CNFP#V2 Frequently Asked Questions (FAQs)

  • The recommended power-on sequence is to apply VCC first, followed by VCCIO, and then the clock signal. This ensures proper initialization of the internal voltage regulators and prevents latch-up.
  • The clock source can be configured using the Clock Control Register (CCR). The CCR register allows selection of the clock source, clock frequency, and clock mode. Refer to the user manual for detailed instructions.
  • The maximum operating frequency of the R5F21335CNFP#V2 is 32 MHz. However, the actual operating frequency may be limited by the system clock source, voltage, and temperature.
  • The built-in ADC on the R5F21335CNFP#V2 can be used by configuring the ADC Control Register (ADCCR) and the ADC Channel Select Register (ADCSR). The ADC can be triggered by a software trigger or an external trigger signal.
  • The VCCIO pin is the power supply pin for the I/O circuits. It should be connected to a power source with a voltage range of 1.8V to 3.6V. The VCCIO pin is separate from the VCC pin, which powers the core logic.

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R5F21335CNFP#V2 Overview

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