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RE1C001ZPTL - ROHM Semiconductor

Description: Pch -20V -100mA Small Signal MOSFET

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Symbol
RE1C001ZPTL - ROHM Semiconductor - PCB symbol
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PCB Footprints
RE1C001ZPTL - ROHM Semiconductor PCB footprint - Other - Other - RE1C001ZPTL-2
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3D Models
RE1C001ZPTL - ROHM Semiconductor - 3D model - Other - RE1C001ZPTL-2
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RE1C001ZPTL Details

  • Manufacturer Part Number:

    RE1C001ZPTL

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    EMT3F, 3 PIN

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    21 Weeks

  • Manufacturer:

    ROHM Semiconductor

  • YTEOL:

    6

  • Configuration:

    SINGLE WITH BUILT-IN DIODE AND RESISTOR

  • DS Breakdown Voltage-Min:

    20 V

  • Drain Current-Max (ID):

    0.1 A

  • Drain-source On Resistance-Max:

    3.8 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-F3

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    0.15 W

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    10

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

RE1C001ZPTL Frequently Asked Questions (FAQs)

  • A recommended PCB layout for optimal thermal performance would be to have a large copper area on the bottom layer connected to the thermal pad, and to use thermal vias to dissipate heat. A minimum of 2oz copper thickness is recommended.
  • To ensure stable operation with a high-ESR output capacitor, it's recommended to add a 1-10nF ceramic capacitor in parallel with the output capacitor to reduce the ESR. Additionally, the output capacitor should be placed close to the IC to minimize parasitic inductance.
  • The maximum allowed voltage on the EN pin is 6V. Exceeding this voltage may cause damage to the internal circuitry.
  • While ceramic capacitors can be used for CIN, it's recommended to use an electrolytic capacitor or a polymer capacitor with a low ESR to ensure stable operation. Ceramic capacitors may cause oscillation or instability due to their high ESR.
  • The output voltage ripple can be calculated using the following formula: ΔVout = (Iout * ESR) / (f * Cout), where Iout is the output current, ESR is the equivalent series resistance of the output capacitor, f is the switching frequency, and Cout is the output capacitance.

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RE1C001ZPTL Overview

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