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RU1E002SPTCL - ROHM Semiconductor

Description: 4V Drive Pch MOSFET

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RU1E002SPTCL - ROHM Semiconductor - PCB symbol
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PCB Footprints
RU1E002SPTCL - ROHM Semiconductor PCB footprint - SO Transistor Flat Lead - SO Transistor Flat Lead - UMT3F
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3D Models
RU1E002SPTCL - ROHM Semiconductor - 3D model - SO Transistor Flat Lead - UMT3F
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RU1E002SPTCL Details

  • Manufacturer Part Number:

    RU1E002SPTCL

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    UMT3F, 3 PIN

  • Pin Count:

    3

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    21 Weeks

  • Manufacturer:

    ROHM Semiconductor

  • YTEOL:

    6.5

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    30 V

  • Drain Current-Max (ID):

    0.25 A

  • Drain-source On Resistance-Max:

    1.4 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-F3

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    10

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

RU1E002SPTCL Frequently Asked Questions (FAQs)

  • The recommended operating temperature range for the RU1E002SPTCL is -40°C to 125°C.
  • To ensure reliability, follow the recommended derating guidelines, use a suitable thermal design, and consider using a heat sink or thermal interface material.
  • The maximum allowable power dissipation for the RU1E002SPTCL is 1.5W. Exceeding this limit may cause damage to the device.
  • Yes, the RU1E002SPTCL is suitable for high-frequency switching applications up to 100 kHz. However, ensure proper PCB design and layout to minimize parasitic inductance and capacitance.
  • Follow proper ESD handling procedures, such as using an ESD wrist strap, ESD mat, and ESD-safe packaging, to prevent damage to the device.

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RU1E002SPTCL Overview

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