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SKW30N60 - Infineon

Description: Infineon SKW30N60 IGBT, 41 A 600 V, 3-Pin TO-247

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PCB Footprints
SKW30N60 - Infineon PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - PG-TO247
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3D Models
SKW30N60 - Infineon  - 3D model - Transistor Outline, Vertical - PG-TO247
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SKW30N60 Details

  • Manufacturer Part Number:

    SKW30N60

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TO-247AC

  • Pin Count:

    3

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.29.00.95

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    0

  • Additional Feature:

    LOW CONDUCTION LOSS

  • Case Connection:

    COLLECTOR

  • Collector Current-Max (IC):

    41 A

  • Collector-Emitter Voltage-Max:

    600 V

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • Fall Time-Max (tf):

    70 ns

  • Gate-Emitter Thr Voltage-Max:

    5 V

  • Gate-Emitter Voltage-Max:

    20 V

  • JEDEC-95 Code:

    TO-247AC

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    250 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    NO

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    391 ns

  • Turn-on Time-Nom (ton):

    78 ns

SKW30N60 Frequently Asked Questions (FAQs)

  • The maximum safe operating area (SOA) for the SKW30N60 is not explicitly stated in the datasheet, but it can be estimated based on the device's thermal resistance and maximum junction temperature. As a general guideline, the SOA is typically limited by the device's thermal capabilities, and the user should ensure that the device operates within the recommended temperature range to avoid thermal runaway.
  • To minimize switching losses, ensure that the SKW30N60 is driven with a high-quality gate driver that provides a fast rise and fall time (typically <10 ns) and a sufficient gate-source voltage (typically >10 V). Additionally, consider using a gate resistor to slow down the gate voltage transition and reduce electromagnetic interference (EMI).
  • To minimize parasitic inductance and capacitance, use a compact PCB layout with short, wide traces for the drain, source, and gate connections. Keep the gate-source loop as small as possible, and use a ground plane to reduce electromagnetic interference (EMI). Avoid using vias or narrow traces, and consider using a Kelvin connection for the source pin to reduce parasitic inductance.
  • For high-power applications, ensure that the SKW30N60 is mounted on a heat sink with a thermal interface material (TIM) to reduce thermal resistance. Use a heat sink with a high thermal conductivity (e.g., copper or aluminum) and a sufficient surface area to dissipate heat. Consider using a fan or other cooling system to maintain a safe operating temperature.
  • The recommended soldering conditions for the SKW30N60 are a peak temperature of 260°C (500°F) for a maximum of 10 seconds, with a soldering iron temperature of 350°C (662°F). Use a solder with a melting point above 217°C (423°F) to ensure reliable connections.

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SKW30N60 Overview

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Part Image SKW30N60FKSA1 Infineon Technologies AG

Insulated Gate Bipolar Transistor, 41A I(C), 600V V(BR)CES, N-Channel, TO-247AC