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SLG46620-AG - Renesas Electronics

Description: The SLG46620-A provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46620-A.  This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power AEC-Q100 qualified integrated circuit. 

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SLG46620-AG - Renesas Electronics - PCB symbol
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SLG46620-AG - Renesas Electronics PCB footprint - Small Outline Packages - Small Outline Packages - TSSOP_20
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SLG46620-AG - Renesas Electronics - 3D model - Small Outline Packages - TSSOP_20
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SLG46620-AG Details

  • Manufacturer Part Number:

    SLG46620-AG

  • Brand Name:

    Renesas

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TSSOP

  • Pin Count:

    20

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.55

  • Factory Lead Time:

    18 Weeks

  • Manufacturer:

    Renesas Electronics Corporation

  • YTEOL:

    7

  • Architecture:

    PLA-TYPE

  • In-System Programmable:

    NO

  • JESD-30 Code:

    R-PDSO-G20

  • JTAG BST:

    NO

  • Length:

    6.5 mm

  • Moisture Sensitivity Level:

    1

  • Number of Dedicated Inputs:

    1

  • Number of I/O Lines:

    17

  • Number of Inputs:

    18

  • Number of Macro Cells:

    1

  • Number of Outputs:

    17

  • Number of Terminals:

    20

  • Operating Temperature-Max:

    105 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    1 DEDICATED INPUTS, 17 I/O

  • Output Function:

    MACROCELL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Equivalence Code:

    TSSOP20,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Programmable Logic Type:

    OT PLD

  • Screening Level:

    AEC-Q100

  • Seated Height-Max:

    1.2 mm

  • Supply Voltage-Max:

    3.6 V

  • Supply Voltage-Min:

    1.71 V

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    4.4 mm

SLG46620-AG Frequently Asked Questions (FAQs)

  • Renesas provides a recommended PCB layout guide in the SLG46620-AG application note (Document Number: R01AN4393EU0100). It includes guidelines for component placement, routing, and thermal management to ensure optimal performance and minimize noise.
  • The internal oscillators can be configured using the OSCCFG register (Address: 0x0F). The recommended configuration for optimal clock frequency is to set the OSCSEL bit to '1' and the OSCCFG bits to '010' for a 12MHz clock frequency. Refer to the SLG46620-AG user manual (Document Number: R01UM4640EU0100) for more details.
  • The maximum current consumption of the SLG46620-AG is 150mA (typical) at 3.3V supply voltage and 25°C ambient temperature. However, this value can vary depending on the operating frequency, voltage, and temperature. Refer to the SLG46620-AG datasheet (Document Number: R01DS0344EU0100) for more details.
  • The SLG46620-AG has several power-saving modes, including Sleep, Hibernate, and Shutdown. These modes can be implemented using the Power Management Controller (PMC) registers. Refer to the SLG46620-AG user manual (Document Number: R01UM4640EU0100) for more details on how to configure and use these modes.
  • Renesas recommends using a 0.1uF decoupling capacitor between the VDD and VSS pins of the SLG46620-AG. This value is sufficient to filter out high-frequency noise and ensure stable operation.

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