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SZESD7004MUTAG - onsemi

Description: Low Capacitance (0.2 pF Typical, I/O to I/O); Protection for the Following IEC Standards: IEC 61000-4-2 (±15 kV Contact); UL Flammability Rating of 94 V0; This is a Pb-Free Device; Low ESD Clamping Voltage

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PCB Footprints
SZESD7004MUTAG - onsemi PCB footprint - Other - Other - UDFN10 2.5x1, 0.5P CASE 517BB−01 ISSUE O
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SZESD7004MUTAG - onsemi  - 3D model - Other - UDFN10 2.5x1, 0.5P CASE 517BB−01 ISSUE O
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SZESD7004MUTAG Details

  • Manufacturer Part Number:

    SZESD7004MUTAG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    UDFN10, 2.5x1, 0.5P

  • Package Description:

    UDFN-10

  • Pin Count:

    10

  • Manufacturer Package Code:

    517BB

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.50

  • Factory Lead Time:

    7 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    7

  • Breakdown Voltage-Min:

    5.5 V

  • Case Connection:

    ANODE

  • Clamping Voltage-Max:

    10 V

  • Configuration:

    COMMON ANODE, 4 ELEMENTS, 4 CHANNEL

  • Diode Element Material:

    SILICON

  • Diode Type:

    TRANS VOLTAGE SUPPRESSOR DIODE

  • JESD-30 Code:

    R-PDSO-N10

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    4

  • Number of Terminals:

    10

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity:

    UNIDIRECTIONAL

  • Reference Standard:

    AEC-Q101; IEC-61000-4-2

  • Rep Pk Reverse Voltage-Max:

    5 V

  • Reverse Current-Max:

    1 µA

  • Reverse Test Voltage:

    5 V

  • Surface Mount:

    YES

  • Technology:

    AVALANCHE

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

SZESD7004MUTAG Frequently Asked Questions (FAQs)

  • A good PCB layout for the SZESD7004MUTAG should minimize parasitic inductance and capacitance. Keep the device close to the PCB surface, use a solid ground plane, and keep the input and output traces short and separate. A 4-layer PCB with a dedicated power plane and a dedicated ground plane is recommended.
  • The SZESD7004MUTAG requires a bias voltage of 5V ± 10% on the VCC pin. Ensure that the bias voltage is stable and noise-free. A decoupling capacitor of 10nF to 100nF should be placed close to the VCC pin to filter out high-frequency noise.
  • The SZESD7004MUTAG is rated for operation from -40°C to 125°C. However, the device's performance may degrade at extreme temperatures. Ensure that the device is operated within the recommended temperature range for optimal performance and reliability.
  • The SZESD7004MUTAG has built-in ESD protection, but it's still important to follow proper ESD handling procedures during assembly and testing. Use an ESD wrist strap or mat, and ensure that the device is handled in a static-free environment.
  • The SZESD7004MUTAG should be stored in a dry, cool place with a temperature range of -40°C to 30°C and humidity below 60%. Avoid exposing the device to direct sunlight, moisture, or extreme temperatures during storage.

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SZESD7004MUTAG Overview

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