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SZESD7104MUTAG - onsemi

Description: SZESD7104MTWTAG Wettable Flank Package; Low ESD Clamping Voltage; SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable; These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant; Low Capacitance (0.3 pF Typical, I/O to GND); IEC61000−4−2 (ESD): Level 4

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SZESD7104MUTAG - onsemi - PCB symbol
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PCB Footprints
SZESD7104MUTAG - onsemi PCB footprint - Other - Other - SZESD7104MUTAG-3
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SZESD7104MUTAG - onsemi - 3D model - Other - SZESD7104MUTAG-3
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SZESD7104MUTAG Details

  • Manufacturer Part Number:

    SZESD7104MUTAG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    UDFN-10

  • Package Description:

    WUDFNW-10

  • Manufacturer Package Code:

    517BB

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.50

  • Manufacturer:

    onsemi

  • YTEOL:

    7

  • Additional Feature:

    ULTRA LOW CAPACITANCE

  • Breakdown Voltage-Min:

    5.5 V

  • Case Connection:

    ANODE

  • Clamping Voltage-Max:

    10 V

  • Configuration:

    COMMON ANODE, 5 ELEMENTS, 5 CHANNEL

  • Diode Element Material:

    SILICON

  • Diode Type:

    TRANS VOLTAGE SUPPRESSOR DIODE

  • JESD-30 Code:

    R-PDSO-N10

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    5

  • Number of Terminals:

    10

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity:

    UNIDIRECTIONAL

  • Reference Standard:

    AEC-Q101; IEC-61000-4-2

  • Rep Pk Reverse Voltage-Max:

    5 V

  • Reverse Current-Max:

    1 µA

  • Reverse Test Voltage:

    5 V

  • Surface Mount:

    YES

  • Technology:

    AVALANCHE

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

SZESD7104MUTAG Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the input and output traces short and away from each other to minimize noise coupling.
  • Ensure the input voltage (VIN) is within the recommended range (2.7V to 5.5V). Use a stable voltage regulator and decouple the input with a 10uF capacitor. Also, ensure the output voltage (VOUT) is within the recommended range (1.2V to 3.6V).
  • The maximum output current capability of the SZESD7104MUTAG is 1.5A. However, it's recommended to derate the output current based on the ambient temperature and PCB thermal design.
  • Use a voltage supervisor or a reset IC to monitor the input voltage and reset the system if it falls outside the recommended range. Also, consider adding overvoltage protection (OVP) and undervoltage protection (UVP) circuits to prevent damage to the device.
  • The thermal derating curve for the SZESD7104MUTAG can be found in the datasheet. As a general guideline, the device can operate up to 125°C junction temperature, but the output current should be derated by 50% for every 10°C increase above 85°C.

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SZESD7104MUTAG Overview

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