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W631GG6MB-11 - Winbond

Description: DRAM Chip DDR3 SDRAM 1Gbit 64Mx16 1.5V 96-Pin VFBGA

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PCB Footprints
W631GG6MB-11 - Winbond PCB footprint - BGA - BGA - VFBGA96
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3D Models
W631GG6MB-11 - Winbond  - 3D model - BGA - VFBGA96
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W631GG6MB-11 Details

  • Manufacturer Part Number:

    W631GG6MB-11

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    VFBGA-96

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.32.00.32

  • Date Of Intro:

    2017-12-01

  • Manufacturer:

    Winbond Electronics Corp

  • YTEOL:

    0

  • Access Mode:

    MULTI BANK PAGE BURST

  • Additional Feature:

    AUTO/SELF REFRESH

  • JESD-30 Code:

    R-PBGA-B96

  • Length:

    13 mm

  • Memory Density:

    1073741824 bit

  • Memory IC Type:

    DDR3 DRAM

  • Memory Width:

    16

  • Number of Functions:

    1

  • Number of Ports:

    1

  • Number of Terminals:

    96

  • Number of Words:

    67108864 words

  • Number of Words Code:

    64000000

  • Operating Mode:

    SYNCHRONOUS

  • Operating Temperature-Max:

    95 °C

  • Organization:

    64MX16

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    VFBGA

  • Package Shape:

    RECTANGULAR

  • Package Style:

    GRID ARRAY, VERY THIN PROFILE, FINE PITCH

  • Seated Height-Max:

    1 mm

  • Self Refresh:

    YES

  • Supply Voltage-Max (Vsup):

    1.575 V

  • Supply Voltage-Min (Vsup):

    1.425 V

  • Supply Voltage-Nom (Vsup):

    1.5 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    OTHER

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    BOTTOM

  • Width:

    7.5 mm

W631GG6MB-11 Frequently Asked Questions (FAQs)

  • The recommended operating temperature range for the W631GG6MB-11 is 0°C to 70°C, with a storage temperature range of -40°C to 85°C.
  • The power-up sequence should be VCC first, then VPP, and finally CLK. The power-down sequence should be the reverse: CLK first, then VPP, and finally VCC. This ensures proper device operation and prevents latch-up or other issues.
  • The maximum clock frequency supported by the W631GG6MB-11 is 133 MHz, but it can operate at lower frequencies as well, depending on the system requirements.
  • The address signals (A0-A22) should be valid at least 10 ns before the rising edge of the clock signal (CLK), and the data signals (DQ0-DQ31) should be valid at least 10 ns after the rising edge of the clock signal. This ensures proper data transfer and minimizes the risk of data corruption.
  • The VPP pin is used for programming the device. It should be connected to a 3.3V power supply or a programming voltage source, depending on the specific programming requirements. The VPP pin should not be left floating or connected to GND, as this can cause device malfunction or damage.

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W631GG6MB-11 Overview

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