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WM8731CLSEFL/R - Cirrus Logic

Description: Audio Codec 2ADC /2 DAC 24-Bit 28-Pin QFN T/R

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PCB Footprints
WM8731CLSEFL/R - Cirrus Logic PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - FL: 28 PIN QFN
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3D Models
WM8731CLSEFL/R - Cirrus Logic  - 3D model - Quad Flat No-Lead - FL: 28 PIN QFN
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WM8731CLSEFL/R Details

  • Manufacturer Part Number:

    WM8731CLSEFL/R

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    5 X 5 MM, 0.85 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220, QFN-28

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

WM8731CLSEFL/R Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply the analog power supply (AVDD) first, followed by the digital power supply (DVDD), and then the clock signal. This ensures that the analog circuitry is stable before the digital circuitry is enabled.
  • To configure the WM8731 for master clock mode, set the MCLK pin as an output by setting the MCLKOE bit in the Clock Control Register (0x04). Then, set the desired clock frequency using the MCLKDIV bits in the Clock Control Register.
  • The Zero-Cross Detector (ZCD) pin is used to detect the zero-crossing point of the analog input signal, which helps to reduce distortion and improve the overall audio quality. It is recommended to connect the ZCD pin to the analog input signal through a capacitor and resistor network.
  • To optimize the ADC performance, ensure that the analog input signal is properly filtered and biased, and that the ADC clock frequency is set to the recommended value (typically 256 fs). Additionally, adjust the ADC gain settings to optimize the signal-to-noise ratio (SNR) for the specific application.
  • To minimize noise and interference, it is recommended to separate the analog and digital signal traces on the PCB, and to use a ground plane to shield the analog signals. Additionally, use a low-ESR capacitor for the analog power supply decoupling, and ensure that the digital signals are properly terminated.

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