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WM8960CGEFL/RV - Cirrus Logic

Description: IC CODEC CLASS D SPKR DVR 32QFN

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PCB Footprints
WM8960CGEFL/RV - Cirrus Logic PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - 32 PIN QFN PLASTIC PACKAGE 5 X 5 X 0.9 mm BODY, 0.50 mm LEAD PITCH
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3D Models
WM8960CGEFL/RV - Cirrus Logic  - 3D model - Quad Flat No-Lead - 32 PIN QFN PLASTIC PACKAGE 5 X 5 X 0.9 mm BODY, 0.50 mm LEAD PITCH
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WM8960CGEFL/RV Details

  • Manufacturer Part Number:

    WM8960CGEFL/RV

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    5 X 5 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220VHHD-5, QFN-32

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

  • Companding Law:

    A/MU-LAW

  • Filter:

    YES

  • JESD-30 Code:

    S-PQCC-N32

  • Length:

    5 mm

  • Number of Functions:

    1

  • Number of Terminals:

    32

  • Operating Mode:

    SYNCHRONOUS

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    HVQCCN

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Seated Height-Max:

    1 mm

  • Supply Voltage-Nom:

    1.8 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Telecom IC Type:

    PCM CODEC

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Width:

    5 mm

WM8960CGEFL/RV Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply VDDIO, followed by VDDD, and then VDDA. This ensures that the internal voltage regulators are powered up correctly.
  • The WM8960 can be configured using the I2C interface. The device has several registers that control the audio settings, such as gain, mute, and routing. Refer to the datasheet for the register map and configuration details.
  • The maximum input signal level that the WM8960 can handle is 2.2Vrms. Exceeding this level may result in distortion or damage to the device.
  • To optimize the WM8960 for low power consumption, use the power-down modes, disable unused blocks, and adjust the clock frequency. Additionally, use the dynamic voltage and frequency scaling feature to reduce power consumption.
  • The recommended layout and routing for the WM8960 involves keeping the analog and digital signals separate, using a solid ground plane, and minimizing the length of the analog signal traces. Refer to the datasheet for more detailed layout and routing guidelines.

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WM8960CGEFL/RV Overview

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