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XC6SLX150T-2FGG900I - AMD

Description: FPGA - Field Programmable Gate Array XC6SLX150T-2FGG900I

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XC6SLX150T-2FGG900I - AMD PCB footprint - BGA - BGA - FGG900_1
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XC6SLX150T-2FGG900I - AMD  - 3D model - BGA - FGG900_1
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XC6SLX150T-2FGG900I Details

  • Manufacturer Part Number:

    XC6SLX150T-2FGG900I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    31 X 31 MM, 1 MM PITCH, LEAD FREE, BGA-900

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PBGA-B900

  • JESD-609 Code:

    e1

  • Length:

    31 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    11519

  • Number of Inputs:

    530

  • Number of Logic Cells:

    147443

  • Number of Outputs:

    530

  • Number of Terminals:

    900

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    11519 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA900,30X30,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    31 mm

XC6SLX150T-2FGG900I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX150T-2FGG900I is 350 MHz, but it can vary depending on the specific application and design.
  • Xilinx provides a DDR3 memory interface IP core that can be used to implement a DDR3 memory interface on the XC6SLX150T-2FGG900I. The IP core is available in the Vivado Design Suite and can be customized to meet specific design requirements.
  • The power consumption of the XC6SLX150T-2FGG900I depends on the specific application and design. However, according to the datasheet, the typical power consumption is around 2.5W for a typical design. It's recommended to use the Xilinx Power Estimator (XPE) tool to get a more accurate estimate of power consumption for a specific design.
  • Yes, the XC6SLX150T-2FGG900I has built-in support for high-speed serial interfaces like PCIe and SATA. Xilinx provides IP cores for these interfaces that can be used to implement high-speed serial interfaces in the FPGA.
  • Xilinx provides a range of debugging and testing tools, including ChipScope, SignalTap, and the Vivado Logic Analyzer. These tools can be used to debug and test designs on the XC6SLX150T-2FGG900I.

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XC6SLX150T-2FGG900I Overview

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Image Part Number Model
Part Image XC6SLX150T-2FG900I AMD

Field Programmable Gate Array, 11519 CLBs, 667MHz, 147443-Cell, CMOS, PBGA900

Part Image XC6SLX150T-2FG900C AMD

Field Programmable Gate Array, 11519 CLBs, 667MHz, 147443-Cell, CMOS, PBGA900

Part Image XC6SLX150T-2FG900I AMD Xilinx

Field Programmable Gate Array, 11519 CLBs, 667MHz, 147443-Cell, CMOS, PBGA900

Part Image XC6SLX150T-2FG900C AMD Xilinx

Field Programmable Gate Array, 11519 CLBs, 667MHz, 147443-Cell, CMOS, PBGA900