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XC6SLX25-3FG484I - AMD

Description: FPGA - Field Programmable Gate Array

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XC6SLX25-3FG484I - AMD PCB footprint - BGA - BGA - FG(G) 484
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XC6SLX25-3FG484I - AMD  - 3D model - BGA - FG(G) 484
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XC6SLX25-3FG484I Details

  • Manufacturer Part Number:

    XC6SLX25-3FG484I

  • Part Life Cycle Code:

    Active

  • Package Description:

    23 X 23 MM, 1 MM PITCH, FBGA-484

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    862 MHz

  • Combinatorial Delay of a CLB-Max:

    0.21 ns

  • JESD-30 Code:

    S-PBGA-B484

  • JESD-609 Code:

    e0

  • Length:

    23 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    1879

  • Number of Inputs:

    266

  • Number of Logic Cells:

    24051

  • Number of Outputs:

    266

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    1879 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA484,22X22,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    225

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Lead (Sn63Pb37)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    23 mm

XC6SLX25-3FG484I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX25-3FG484I is 350 MHz, but it depends on the specific application and design implementation.
  • You can implement DDR3 memory interface using the MIG (Memory Interface Generator) tool provided by Xilinx, which generates a customized IP core for the FPGA.
  • The power consumption of the XC6SLX25-3FG484I depends on the specific application, clock frequency, and design implementation. However, the typical power consumption is around 1.2W to 2.5W.
  • Yes, the XC6SLX25-3FG484I supports high-speed serial interfaces like PCIe and SATA through its high-speed transceivers, which can operate up to 6.25 Gbps.
  • You can use Xilinx's ChipScope Pro tool, which provides a set of debug and test tools, including logic analyzers, signal tap, and bus analyzers, to debug and test your design.

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XC6SLX25-3FG484I Overview

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Image Part Number Model
Part Image XC6SLX25-3FGG484I AMD

Field Programmable Gate Array, 1879 CLBs, 862MHz, 24051-Cell, CMOS, PBGA484

Part Image XC6SLX25-3FGG484C AMD

Field Programmable Gate Array, 1879 CLBs, 862MHz, 24051-Cell, CMOS, PBGA484

Part Image XC6SLX25-3FG484C AMD

Field Programmable Gate Array, 1879 CLBs, 862MHz, 24051-Cell, CMOS, PBGA484

Part Image XC6SLX25-3FGG484C AMD Xilinx

Field Programmable Gate Array, 1879 CLBs, 862MHz, 24051-Cell, CMOS, PBGA484

Part Image XC6SLX25-3FGG484I AMD Xilinx

Field Programmable Gate Array, 1879 CLBs, 862MHz, 24051-Cell, CMOS, PBGA484

For a full list of alternate parts for XC6SLX25-3FG484I, check out Findchips.com