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XCAU10P-2SBVB484I - AMD

Description: FPGA - Field Programmable Gate Array XCAU10P-2SBVB484I

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XCAU10P-2SBVB484I - AMD PCB footprint - BGA - BGA - SBVB484
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XCAU10P-2SBVB484I - AMD  - 3D model - BGA - SBVB484
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XCAU10P-2SBVB484I Details

  • Manufacturer Part Number:

    XCAU10P-2SBVB484I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    FCBGA-484

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    19

  • JESD-30 Code:

    S-PBGA-B484

  • Length:

    19 mm

  • Moisture Sensitivity Level:

    4

  • Number of CLBs:

    5500

  • Number of Inputs:

    204

  • Number of Logic Cells:

    96250

  • Number of Outputs:

    204

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    5500 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    FBGA

  • Package Equivalence Code:

    BGA484,22X22,32

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, FINE PITCH

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Seated Height-Max:

    2.79 mm

  • Supply Voltage-Max:

    0.876 V

  • Supply Voltage-Min:

    0.825 V

  • Supply Voltage-Nom:

    0.85 V

  • Surface Mount:

    YES

  • Technology:

    16 nm

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    19 mm

XCAU10P-2SBVB484I Frequently Asked Questions (FAQs)

  • The recommended operating temperature range for XCAU10P-2SBVB484I is 0°C to 100°C (junction temperature) and -40°C to 125°C (storage temperature).
  • Power management for XCAU10P-2SBVB484I can be implemented using the Power Management Interface (PMI) and the Advanced Power Management (APM) features. Refer to the datasheet and AMD's power management documentation for more information.
  • The maximum current draw for XCAU10P-2SBVB484I is dependent on the specific use case and configuration. However, the typical current draw is around 3.5A for the entire device. Refer to the datasheet for more information on power consumption.
  • Clocking and timing for XCAU10P-2SBVB484I can be configured using the Clock Management Unit (CMU) and the Timing Closure (TC) features. Refer to the datasheet and AMD's clocking and timing documentation for more information.
  • The recommended PCB layout and design considerations for XCAU10P-2SBVB484I include following AMD's guidelines for signal integrity, power integrity, and thermal management. Refer to the datasheet and AMD's PCB design documentation for more information.

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XCAU10P-2SBVB484I Overview

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Part Image XCAU10P-2SBVB484I AMD Xilinx

Field Programmable Gate Array, 5500 CLBS, 96250-Cell, PBGA484