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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	M48T35AV-10PC1 STMicroelectronics	1	STMicroelectronics M48T35AV-10PC1 NVRAM, 256kbit, 100ns, 3 → 3.6 V 28-Pin PCDIP	Dual-In-Line Packages	M48T35AV-10PC1	3D model available Symbol and footprint available 3	1 Download Model
	70V3579S5BCI Renesas Electronics	1	The 70V3579 is a high-speed 32K × 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3579 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3579S5BCI	3D model available Symbol and footprint available 3	1 Download Model
	71V65703S80BQ8 Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65703S80BQ8	3D model available Symbol and footprint available 3	1 Download Model
	7052S20G Renesas Electronics	1	The 7052 is a high-speed 2K x 8 FourPort™ Static RAM to be used where multiple access into a common RAM is required. It is designed for systems where on-chip hardware port arbitration is not needed and has four independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low power standby power mode. Milita	Other	7052S20G	3D model available Symbol and footprint available 3	1 Download Model

	71V67803S150PFG Renesas Electronics	1	The 71V67803 3.3V CMOS SRAM is organized as 512K x 18. The 71V67803 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V67803S150PFG	3D model available Symbol and footprint available 3	1 Download Model
	7009L15PFG8 Renesas Electronics	1	The 7009 is a high-speed 128K x 8 Dual-Port Static RAM designed to be used as a stand-alone 1M-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	7009L15PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71V65903S85PFG Renesas Electronics	1	The 71V65903 3.3V CMOS SRAM is organized as 512K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65903 contain address, data-in and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V65903S85PFG	3D model available Symbol and footprint available 3	1 Download Model
	R1LP0408DSP-5SI#S0 Renesas Electronics	1	The R1LP0408D Series is a family of 4-Mbit static RAMs organized 512-kword × 8-bit, fabricated by Renesas’s high-performance CMOS and TFT technologies. The R1LP0408D Series has realized higher density, higher performance and low power consumption. The R1LP0408D Series offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It is offered in 32-pin SOP and 32-pin TSOP.	Small Outline Packages	R1LP0408DSP-5SI#S0	3D model available Symbol and footprint available 3	1 Download Model
	70T633S12BF8 Renesas Electronics	1	The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T633S12BF8	3D model available Symbol and footprint available 3	1 Download Model
	5962-8861009ZA Renesas Electronics	1	The 5962-88610 (IDT 7133/43) is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML.	Other	5962-8861009ZA	3D model available Symbol and footprint available 3	1 Download Model
	7132SA35CB Renesas Electronics	1	The 7132 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7142 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535	Ceramic Dual-In-Line Packages	7132SA35CB	3D model not available Symbol and footprint available 2	1 Download Model
	70V3399S133BC Renesas Electronics	1	The 70V3399 is a high-speed 128K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3399 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3399S133BC	3D model available Symbol and footprint available 3	1 Download Model
	5962-8866206XA Renesas Electronics	1	The 5962-88662 (71256 SRAM) is organized as 32K x 8. This part offers a reduced power standby mode for significant system level power and cooling savings. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Ceramic Dual-In-Line Packages	5962-8866206XA	3D model not available Symbol and footprint available 2	1 Download Model
	70V7339S133BCI8 Renesas Electronics	1	The 70V7339 is a high-speed 512K x 18 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 8K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 8K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7339S133BCI8	3D model available Symbol and footprint available 3	1 Download Model
	70T651S10BFG Renesas Electronics	1	The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T651S10BFG	3D model available Symbol and footprint available 3	1 Download Model

	71V65703S80BQG8 Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65703S80BQG8	3D model available Symbol and footprint available 3	1 Download Model
	71321LA25TFGI Renesas Electronics	1	The 71321 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 71421 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low sta	Quad Flat Packages	71321LA25TFGI	3D model available Symbol and footprint available 3	1 Download Model
	7142LA100C Renesas Electronics	1	The 7142 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port RAM together with the 7132 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Ceramic Dual-In-Line Packages	7142LA100C	3D model not available Symbol and footprint available 2	1 Download Model
	70V7319S133BC8 Renesas Electronics	1	The 70V7319 is a high-speed 256K x 18 (4Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7319S133BC8	3D model available Symbol and footprint available 3	1 Download Model
	70V658S12BFGI Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V658S12BFGI	3D model available Symbol and footprint available 3	1 Download Model
	71321LA25PFGI Renesas Electronics	1	The 71321 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 71421 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low sta	Quad Flat Packages	71321LA25PFGI	3D model available Symbol and footprint available 3	1 Download Model
	70T3399S133BF Renesas Electronics	1	The 70T3399 is a high-speed 128K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3399 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3399S133BF	3D model available Symbol and footprint available 3	1 Download Model
	71V65803S100BGI Renesas Electronics	1	The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65803S100BGI	3D model available Symbol and footprint available 3	1 Download Model
	70V3589S133BFI Renesas Electronics	1	The 70V3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3589S133BFI	3D model available Symbol and footprint available 3	1 Download Model
	71V65603S150BQG8 Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S150BQG8	3D model available Symbol and footprint available 3	1 Download Model
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