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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	7014S12PFG Renesas Electronics	1	The 7014 is a high-speed 4K x 9 Dual-Port Static RAM designed to be used in systems where on-chip hardware port arbitration is not needed. This part lends itself to high-speed applications which do not rely on BUSY signals to manage simultaneous access. It utilizes a 9-bit wide data path to allow for parity at the user's option which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking.	Quad Flat Packages	7014S12PFG	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S200BGI8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S200BGI8	3D model available Symbol and footprint available 3	1 Download Model
	M48Z02-70PC1 STMicroelectronics	1	STMicroelectronics M48Z02-70PC1 NVRAM, 16kbit, 70ns, 5V 24-Pin PCDIP	Dual-In-Line Packages	M48Z02-70PC1	3D model available Symbol and footprint available 3	1 Download Model
	71V632S7PFGI8 Renesas Electronics	1	The 71V632 3.3V CMOS SRAM is organized as 64K x 32. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz. The 71V632 SRAM contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V632S7PFGI8	3D model available Symbol and footprint available 3	1 Download Model

	71V65603S100BQG Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S100BQG	3D model available Symbol and footprint available 3	1 Download Model
	RMLV1616AGSD-5S2#AC0 Renesas Electronics	1	The RMLV1616A Series is a family of 16-Mbit static RAMs organized 1, 048, 576-word × 16-bit, fabricated by Renesas’s high-performance Advanced LPSRAM technologies. The RMLV1616A Series has realized higher density, higher performance and low power consumption. The RMLV1616A Series offers low power standby power dissipation;therefore, it is suitable for battery backup systems. It is offered in 48pin TSOP (I), 52pin TSOP (II) or 48-ball fine pitch ball grid array.	Small Outline Packages	RMLV1616AGSD-5S2#AC0	3D model available Symbol and footprint available 3	1 Download Model
	6116LA70DB Renesas Electronics	1	The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Dual-In-Line Packages	6116LA70DB	3D model available Symbol and footprint available 3	1 Download Model
	6116LA35DB Renesas Electronics	1	The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Dual-In-Line Packages	6116LA35DB	3D model available Symbol and footprint available 3	1 Download Model
	71V124SA12YG8 Renesas Electronics	1	The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Other	71V124SA12YG8	3D model available Symbol and footprint available 3	1 Download Model
	71024S20TYG Renesas Electronics	1	The 71024 5V CMOS SRAM is organized as 128K x 8. All bidirectional inputs and outputs of the 71024 are TTL-compatible, and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Other	71024S20TYG	3D model available Symbol and footprint available 3	1 Download Model
	70V9099L9PFG Renesas Electronics	1	The 70V9099 is a high-speed 128K x 8 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V9099L9PFG	3D model available Symbol and footprint available 3	1 Download Model
	M48Z12-150PC1 STMicroelectronics	1	STMicroelectronics M48Z12-150PC1 NVRAM, 16kbit, 5ns, 5V 24-Pin PCDIP	Dual-In-Line Packages	M48Z12-150PC1	3D model available Symbol and footprint available 3	1 Download Model
	R1QBA7236ABG-20IA0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.DDR II / II+ (Double Data Rate) SRAMs and QDR^(TM) II / II+ (Quad Data Rate) SRAMs are the ideal memory devices for next generation networking and communications systems. These ultra-fast devices can support high bandwidth systems that require memories capable of very high operating frequencies combined with low latencies and full cycle utilization. DDR SRAMs can provide double data rate (DDR) operation on each data pin in write or read	BGA	R1QBA7236ABG-20IA0	3D model available Symbol and footprint available 3	1 Download Model
	71V67603S133BGG8 Renesas Electronics	1	The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.The order of these three addresses are defined by the internal burst counter and the LBO input pin.	BGA	71V67603S133BGG8	3D model available Symbol and footprint available 3	1 Download Model
	70V657S12BCGI Renesas Electronics	1	The 70V657 is a high-speed 32K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V657S12BCGI	3D model available Symbol and footprint available 3	1 Download Model

	70T633S12BFI Renesas Electronics	1	The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T633S12BFI	3D model available Symbol and footprint available 3	1 Download Model
	M48Z12-70PC1 STMicroelectronics	1	NVRAM 16KBit 5V ZEROPOWER SRAM 70ns M48Z12-70PC1, NVRAM Memory 16kbit Through Hole, 4.5 → 5.5 V, 0 → +70 °C, 24-Pin, PCDIP	Dual-In-Line Packages	M48Z12-70PC1	3D model available Symbol and footprint available 3	1 Download Model
	71V67903S85PFG Renesas Electronics	1	The 71V67903 3.3V CMOS SRAM is organized as 512K x 18. The 71V67903 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V67903S85PFG	3D model available Symbol and footprint available 3	1 Download Model
	7024S70GB Renesas Electronics	1	The 7024 is a high-speed 4Kx 16 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7024S70GB	3D model available Symbol and footprint available 3	1 Download Model
	M48Z58Y-70MH1F STMicroelectronics	1	5 V, 64 Kbit (8 Kb x 8) ZEROPOWER® SRAM	Small Outline Packages	M48Z58Y-70MH1F	3D model available Symbol and footprint available 3	1 Download Model
	7038L20PFGI Renesas Electronics	1	The 7038 is a high-speed 64K x 18 Dual-Port Static RAM designed to be used as a stand-alone 1152K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 36-bit or more word systems. This MASTER/SLAVE approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	7038L20PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7008L25G Renesas Electronics	1	The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Other	7008L25G	3D model available Symbol and footprint available 3	1 Download Model
	6116SA45DB Renesas Electronics	1	The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Dual-In-Line Packages	6116SA45DB	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA150BQ8 Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA150BQ8	3D model available Symbol and footprint available 3	1 Download Model
	709349L7PFGI Renesas Electronics	1	The 709349 is a high-speed 4K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	709349L7PFGI	3D model available Symbol and footprint available 3	1 Download Model
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