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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	R1QBA7218ABB-20IB1 Renesas Electronics	1	The R1Q#A7236 is a 2, 097, 152-word by 36-bit and the R1Q#A7218 is a 4, 194, 304-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, High-Speed, low	BGA	R1QBA7218ABB-20IB1	3D model available Symbol and footprint available 3	1 Download Model
	71V016SA12YG8 Renesas Electronics	1	The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V016SA12YG8	3D model available Symbol and footprint available 3	1 Download Model
	7008L15JG Renesas Electronics	1	The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Plastic Leaded Chip Carrier	7008L15JG	3D model not available Symbol and footprint available 2	1 Download Model
	71V3556SA133BQG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA133BQG	3D model available Symbol and footprint available 3	1 Download Model

	71V2556SA133BG8 Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2556SA133BG8	3D model available Symbol and footprint available 3	1 Download Model
	71T75602S150BG Renesas Electronics	1	The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.	BGA	71T75602S150BG	3D model available Symbol and footprint available 3	1 Download Model
	R1QAA4418RBG-18IB0 Renesas Electronics	1	The R1QAA4436RBG is a 4, 194, 304-word by 36-bit and the R1QAA4418RBG is a 8, 388, 608-word by 18-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, High-Speed,	BGA	R1QAA4418RBG-18IB0	3D model available Symbol and footprint available 3	1 Download Model
	709159L9PF Renesas Electronics	1	The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent	Quad Flat Packages	709159L9PF	3D model available Symbol and footprint available 3	1 Download Model
	71V321L35JG8 Renesas Electronics	1	The 71V321 is a high-speed 2K x 8 Dual-Port Static RAMs with internal interrupt logic for interprocessor communications. The device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode.	Plastic Leaded Chip Carrier	71V321L35JG8	3D model not available Symbol and footprint available 2	1 Download Model
	71V67903S75BQ Renesas Electronics	1	The 71V67903 3.3V CMOS SRAM is organized as 512K x 18. The 71V67903 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V67903S75BQ	3D model available Symbol and footprint available 3	1 Download Model
	71V3558S133PFG Renesas Electronics	1	The 71V3558 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3558 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3558S133PFG	3D model available Symbol and footprint available 3	1 Download Model
	M48T08-100PC1 STMicroelectronics	1	STMicroelectronics M48T08-100PC1 NVRAM, 64kbit, 100ns 28-Pin PCDIP	Dual-In-Line Packages	M48T08-100PC1	3D model available Symbol and footprint available 3	1 Download Model
	70V658S10BF8 Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V658S10BF8	3D model available Symbol and footprint available 3	1 Download Model
	7026S35G Renesas Electronics	1	The 7026 is a high-speed 16K x 16 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7026S35G	3D model available Symbol and footprint available 3	1 Download Model
	7130LA20PFG Renesas Electronics	1	The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535	Quad Flat Packages	7130LA20PFG	3D model available Symbol and footprint available 3	1 Download Model

	R1Q2A4418RBG-40IB0 Renesas Electronics	1	The R1Q2A4436RBG is a 4, 194, 304-word by 36-bit and the R1Q2A4418RBG is a 8, 388, 608-word by 18-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, High-Speed,	BGA	R1Q2A4418RBG-40IB0	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S133BGGI8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S133BGGI8	3D model available Symbol and footprint available 3	1 Download Model
	5962-8866512ZA Renesas Electronics	1	The 5962-88665 (IDT 7133/43) high-speed 2K x 16 Dual-Port Static RAMs is designed to be used as a stand-alone 16-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 32-bit-or-more word width systems. Low-power offers battery backup data retention capability, with each port typically consuming 200?W for a 2V battery. Military grade product in compliance with MIL-PRF-38535 QML.	Other	5962-8866512ZA	3D model available Symbol and footprint available 3	1 Download Model
	70T3399S200BC8 Renesas Electronics	1	The 70T3399 is a high-speed 128K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3399 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3399S200BC8	3D model available Symbol and footprint available 3	1 Download Model
	71V016SA12YGI8 Renesas Electronics	1	The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V016SA12YGI8	3D model available Symbol and footprint available 3	1 Download Model
	70V7339S133BFI8 Renesas Electronics	1	The 70V7339 is a high-speed 512K x 18 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 8K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 8K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7339S133BFI8	3D model available Symbol and footprint available 3	1 Download Model
	71T75602S133PFG Renesas Electronics	1	The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75602S133PFG	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA166BQ8 Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA166BQ8	3D model available Symbol and footprint available 3	1 Download Model
	7164S25YG8 Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Other	7164S25YG8	3D model available Symbol and footprint available 3	1 Download Model
	71256L100TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L100TDB	3D model not available Symbol and footprint available 2	1 Download Model
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