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Image Part Number D.S Description Package Category Prices / Stock Model Action
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7203L40DB Renesas Electronics
1 The 7203 is a 2K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. Ceramic Dual-In-Line Packages 7203L40DB 1 Download Model
Part Image Part Image 1 74HC40105 - 4-bit x 16-word FIFO register@en-us Small Outline Packages 74HC40105D,652 1 Download Model
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72T18115L5BBI Renesas Electronics
1 The 72T18115 is a 256K x 18 / 512K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. BGA 72T18115L5BBI 1 Download Model
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72V273L7-5BCGI8 Renesas Electronics
1 The 72V273 32K x 9/16K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes. BGA 72V273L7-5BCGI8 1 Download Model
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72V2103L6PFG8 Renesas Electronics
1 The 72V2103 256K x 9/128K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes. Quad Flat Packages 72V2103L6PFG8 1 Download Model
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72V04L25JGI Renesas Electronics
1 IC FIFO ASYNC 4KX9 25NS 32PLCC Plastic Leaded Chip Carrier 72V04L25JGI 1 Download Model
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72V06L15JG8 Renesas Electronics
1 The 72V06 is a 16K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. Plastic Leaded Chip Carrier 72V06L15JG8 1 Download Model
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72V251L15JGI8 Renesas Electronics
1 The 72V251 is an 8K x 9 First-In, First-Out memory with clocked read and write controls. It is a 3.3V version of the 72251 device and is applicable for a wide variety of data buffering needs such as graphics, local area networks and interprocessor communication. It has 9-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dualclock operation. Plastic Leaded Chip Carrier 72V251L15JGI8 1 Download Model
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72V06L25JGI8 Renesas Electronics
1 The 72V06 is a 16K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. Plastic Leaded Chip Carrier 72V06L25JGI8 1 Download Model
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7201LA12PDG Renesas Electronics
1 The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. Ceramic Dual-In-Line Packages 7201LA12PDG 1 Download Model
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IDT7201LA12SOG Renesas Electronics
1 IDT IDT7201LA12SOG, FIFO Memory, Dual 4kbit, 512 x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 28-Pin SOIC Small Outline Packages IDT7201LA12SOG 1 Download Model
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IDT7205L12JG Renesas Electronics
1 IDT IDT7205L12JG, FIFO Memory, Dual 72kbit, 8K x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 32-Pin PLCC Plastic Leaded Chip Carrier IDT7205L12JG 1 Download Model
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SN74ALS232BDW Texas Instruments
1 Asynchronous FIFO 64 (16 x 4) Uni-Directional 40MHz 30ns 16-SOIC Small Outline Packages SN74ALS232BDW 1 Download Model
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IDT7201LA12JG Renesas Electronics
1 IDT IDT7201LA12JG, FIFO Memory, Dual 4kbit, 512 x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 32-Pin PLCC Plastic Leaded Chip Carrier IDT7201LA12JG 1 Download Model
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IDT7203L12JG Renesas Electronics
1 IDT IDT7203L12JG, FIFO Memory, Dual 18kbit, 2K x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 32-Pin PLCC Plastic Leaded Chip Carrier IDT7203L12JG 1 Download Model
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SN74V273-6GGM Texas Instruments
1 FIFO 16384 x 18 Synch FIFO Memory BGA SN74V273-6GGM 1 Download Model
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IDT7201LA12PDG Renesas Electronics
1 IDT IDT7201LA12PDG, FIFO Memory, Dual 4kbit, 512 x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 28-Pin PDIP Ceramic Dual-In-Line Packages IDT7201LA12PDG 1 Download Model
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SN74ACT2226DW Texas Instruments
1 FIFO Dual 64x1 FIFO Mem Small Outline Packages SN74ACT2226DW 1 Download Model
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SN74V283PZAEP Texas Instruments
1 Enhanced Product 32768 X 18 Synchronous Fifo Memory Quad Flat Packages SN74V283PZAEP 1 Download Model
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IDT72V245L10TFG Renesas Electronics
1 IDT IDT72V245L10TFG, FIFO Memory, Dual 72kbit, 4K x 18 bit, Uni-Directional 10ns, 3 → 3.6 V, 64-Pin TQFP Quad Flat Packages IDT72V245L10TFG 1 Download Model
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SN74V293-7PZA Texas Instruments
1 SN74V293-7PZA, FIFO Memory Dual 128K x 9 bit, 64K x 18 bit Uni-Directional 5ns 133MHz 3.15 → 3.45 V 80-Pin LQFP Quad Flat Packages SN74V293-7PZA 1 Download Model
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CD74HC40105M96G4 Texas Instruments
1 Registers Hi Sp CMOS Log 4B Small Outline Packages CD74HC40105M96G4 1 Download Model
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SN74V293-15PZAG4 Texas Instruments
1 FIFO Mem Sync Dual Depth/Width Uni-Dir 64K x 18/128K x 9 80-Pin LQFP Tray Quad Flat Packages SN74V293-15PZAG4 1 Download Model
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IDT72V82L15PAG Renesas Electronics
1 IDT IDT72V82L15PAG, FIFO Memory, Dual 9kbit, 1K x 9 bit, Bi-Directional 15ns, 3 → 3.6 V, 56-Pin TSSOP Small Outline Packages IDT72V82L15PAG 1 Download Model
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IDT7204L15SOGI Renesas Electronics
1 IDT IDT7204L15SOGI, FIFO Memory, Dual 36kbit, 4K x 9 bit, Bi-Directional 15ns, 4.5 → 5.5 V, 28-Pin SOIC Small Outline Packages IDT7204L15SOGI 1 Download Model
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