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72831L25PFI
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L25PFI |
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7283L15PA8
Renesas Electronics
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1 | The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7283L15PA8 |
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7283L15PA
Renesas Electronics
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1 | The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7283L15PA |
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1728340000
Weidmüller
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1 | PCB connector (board connection), 125 V, 10 A, Pitch in mm: 3.50, Number of poles: 12, THT solder connection, Box | Other | 1728340000 |
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72831L10TF8
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L10TF8 |
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7283L12PA8
Renesas Electronics
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1 | The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7283L12PA8 |
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72831L25TF8
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L25TF8 |
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72831L15TF8
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L15TF8 |
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1728378
Phoenix Contact
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1 | SMKDS 1/11-3,81 - Printed circuit board terminal, nominal current: 10 A, rated voltage (III/2): 200 V, nominal cross section: 1 mm2, number of potentials: 11, number of rows: 1, number of positions per row: 11, product range: SMKDS 1, pitch: 3.81 mm, connection method: Screw connection with tension sleeve, screw head form: L Slotted, mounting: Wave soldering, conductor/PCB connection direction: 35 °, color: green, Pin layout: Linear pinning, Solder pin [P]: 3.5 mm, number of solder pins per poten | Other | 1728378 |
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1728387
Phoenix Contact
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1 | MCV 1,5/ 4-G-3,81 P14 THR R32 - PCB headers, nominal cross section: 1.5 mm2, color: black, nominal current: 8 A, rated voltage (III/2): 160 V, contact surface: Sn, contact connection type: Pin, number of potentials: 4, number of rows: 1, number of positions: 4, number of connections: 4, product range: MCV 1,5/..-G-THR, pitch: 3.81 mm, mounting: THR soldering / wave soldering, pin layout: Linear pinning, solder pin [P]: 1.4 mm, number of solder pins per potential: 1, plug-in system: COMBICON MC 1, | Other | 1728387 |
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7283L12PAG8
Renesas Electronics
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1 | The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7283L12PAG8 |
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DA7283-01FV2
Renesas Electronics
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1 | The DA7283 ultra-low power haptic driver, combines custom drive sequences, on- and off-resonance, at up to 1kHz. The DA7283 drives both ERM and LRA (narrow and wideband) actuators and track resonance up to 300Hz producing highly complex click/vibration touch effects in a wide range of applications.The DA7283 differs from the DA7280 and DA7281 as it is hardware controlled and is ideal for applications that require a simple buzz or click. It also provides the capability to go into a full standby mode, lowerin | Quad Flat No-Lead | DA7283-01FV2 |
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72831L25TFI
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L25TFI |
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72831L15TFI
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L15TFI |
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1728307
Phoenix Contact
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1 | SMKDS 1/ 4-3,81 - Printed circuit board terminal, nominal current: 10 A, rated voltage (III/2): 200 V, nominal cross section: 1 mm2, number of potentials: 4, number of rows: 1, number of positions per row: 4, product range: SMKDS 1, pitch: 3.81 mm, connection method: Screw connection with tension sleeve, screw head form: L Slotted, mounting: Wave soldering, conductor/PCB connection direction: 35 °, color: green, Pin layout: Linear pinning, Solder pin [P]: 3.5 mm, number of solder pins per potenti | Other | 1728307 |
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7283L15PAGI
Renesas Electronics
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1 | The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7283L15PAGI |
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1728336
Phoenix Contact
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1 | SMKDS 1/ 7-3,81 - Printed circuit board terminal, nominal current: 10 A, rated voltage (III/2): 200 V, nominal cross section: 1 mm2, number of potentials: 7, number of rows: 1, number of positions per row: 7, product range: SMKDS 1, pitch: 3.81 mm, connection method: Screw connection with tension sleeve, screw head form: L Slotted, mounting: Wave soldering, conductor/PCB connection direction: 35 °, color: green, Pin layout: Linear pinning, Solder pin [P]: 3.5 mm, number of solder pins per potenti | Other | 1728336 |
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1728381
Phoenix Contact
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1 | SMKDS 1/12-3,81 - Printed circuit board terminal, nominal current: 10 A, rated voltage (III/2): 200 V, nominal cross section: 1 mm2, number of potentials: 12, number of rows: 1, number of positions per row: 12, product range: SMKDS 1, pitch: 3.81 mm, connection method: Screw connection with tension sleeve, screw head form: L Slotted, mounting: Wave soldering, conductor/PCB connection direction: 35 °, color: green, Pin layout: Linear pinning, Solder pin [P]: 3.5 mm, number of solder pins per poten | Other | 1728381 |
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1728349
Phoenix Contact
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1 | SMKDS 1/ 8-3,81 - Printed circuit board terminal, nominal current: 10 A, rated voltage (III/2): 200 V, nominal cross section: 1 mm2, number of potentials: 8, number of rows: 1, number of positions per row: 8, product range: SMKDS 1, pitch: 3.81 mm, connection method: Screw connection with tension sleeve, screw head form: L Slotted, mounting: Wave soldering, conductor/PCB connection direction: 35 °, color: green, Pin layout: Linear pinning, Solder pin [P]: 3.5 mm, number of solder pins per potenti | Other | 1728349 |
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72831L10PFG
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L10PFG |
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72831L15TFI8
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L15TFI8 |
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72831L10TF
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L10TF |
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7283L15PAI
Renesas Electronics
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1 | The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7283L15PAI |
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172-037-283L031
NorComp
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1 | CONN D-SUB RCPT 37P PNL MNT SLDR | Other | 172-037-283L031 |
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172-037-283L021
NorComp
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1 | 37 Position D-Sub Receptacle, Female Sockets Connector | Other | 172-037-283L021 |
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