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1 | Crystals | Other | NX3225SA-20.000000MHZ-B2 |
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2SA2071P5T100Q
ROHM Semiconductor
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1 | ROHM 2SA2071P5T100Q PNP Transistor, 3 A, -60 V, 3+Tab-Pin SOT-89 | Other | 2SA2071P5T100Q |
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ACASA2002U2002P1AT
Vishay
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1 | Resistor Networks & Arrays 20K/20Kohm .1%/.05% 10/5ppm 0612 Auto | Other | ACASA2002U2002P1AT |
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CRASA20K0F2K00TA
Vishay
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1 | Resistor Networks & Arrays 0612 20K/2Kohms 1% Square Corners | Other | CRASA20K0F2K00TA |
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FX30B-5P-3.81DSA20
Hirose
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1 | Hirose FunctionMAX FX30B, 3.81mm Pitch, 5 Way, 1 Row, Straight PCB Header, Through Hole | Other | FX30B-5P-3.81DSA20 |
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71V016SA20PHG
Renesas Electronics
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1 | The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Small Outline Packages | 71V016SA20PHG |
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71V35761SA200BGG
Renesas Electronics
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1 | The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V35761SA200BGG |
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71256SA20YGI
Renesas Electronics
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1 | The 71256SA 5V CMOS SRAM is organized as 32K x 8. All bidirectional inputs and outputs of the 71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Other | 71256SA20YGI |
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71V016SA20PHGI
Renesas Electronics
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1 | The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Small Outline Packages | 71V016SA20PHGI |
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71V35761SA200BGI
Renesas Electronics
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1 | The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V35761SA200BGI |
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SA20A-TP
MCC
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1 | TVS | Diodes, Axial Diameter Horizontal Mounting | SA20A-TP |
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ADCR-T02R7SA205MB
ABRACON
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1 | CAP 2F 2.7V TH | Capacitor, Polarized Radial Diameter | ADCR-T02R7SA205MB |
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SA20CA-AP
MCC
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1 | TVS | Diodes, Axial Diameter Horizontal Mounting | SA20CA-AP |
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71V35761SA200BQG
Renesas Electronics
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1 | The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V35761SA200BQG |
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RFSA2013TR7
Qorvo
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1 | 50 - 6000 MHz, 5 V Voltage Controlled Attenuator | Quad Flat No-Lead | RFSA2013TR7 |
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71421SA20PF
Renesas Electronics
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1 | The 71421 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a "SLAVE" Dual-Port RAM together with the 71321 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. | Quad Flat Packages | 71421SA20PF |
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6116SA20SOG8
Renesas Electronics
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1 | The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available. | Small Outline Packages | 6116SA20SOG8 |
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2SA2056(TE85L,F)
Toshiba
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1 | Toshiba 2SA2056(TE85L,F) PNP Bipolar Transistor, 2 A, 50 V, 3-Pin TSM | Other | 2SA2056(TE85L,F) |
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71421SA20J
Renesas Electronics
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1 | The 71421 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a "SLAVE" Dual-Port RAM together with the 71321 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. | Plastic Leaded Chip Carrier | 71421SA20J |
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71342SA20J8
Renesas Electronics
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1 | The 71342 is a high-speed 4K x 8 Dual-Port Static RAM containing a fully independent semaphore logic block to assist in arbitrating between ports. This block contains unassigned flags which can be accessed by either side, however, only one side can control the flag at any time. An automatic power down feature, controlled by CE and SEM, permits the on-chip circuitry of each port to enter a very low standby power mode (both CE and SEM HIGH). | Plastic Leaded Chip Carrier | 71342SA20J8 |
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71342SA20PF8
Renesas Electronics
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1 | The 71342 is a high-speed 4K x 8 Dual-Port Static RAM containing a fully independent semaphore logic block to assist in arbitrating between ports. This block contains unassigned flags which can be accessed by either side, however, only one side can control the flag at any time. An automatic power down feature, controlled by CE and SEM, permits the on-chip circuitry of each port to enter a very low standby power mode (both CE and SEM HIGH). | Quad Flat Packages | 71342SA20PF8 |
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6116SA20DB
Renesas Electronics
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1 | The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available. | Dual-In-Line Packages | 6116SA20DB |
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6116SA20SOG
Renesas Electronics
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1 | The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available. | Small Outline Packages | 6116SA20SOG |
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NSV2SA2029M3T5G
onsemi
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1 | Reduces Board Space | Other | NSV2SA2029M3T5G |
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2SA2070(TE12L,F)
Toshiba
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1 | Bipolar Transistors - BJT PWR TRANS PW-MINI V=50 | Other | 2SA2070(TE12L,F) |
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