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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	CY7C1020DV33-10ZSXI Infineon	1	CYPRESS SEMICONDUCTOR - CY7C1020DV33-10ZSXI - IC, SRAM, 512KBIT, PARALLEL, 10NS TSOP44	Small Outline Packages	CY7C1020DV33-10ZSXI	3D model available Symbol and footprint available 3	1 Download Model
	IS62WV102416BLL-25TLI Integrated Silicon Solution Inc.	1	SRAM 16M (1Mx16) 25ns Async SRAM	Small Outline Packages	IS62WV102416BLL-25TLI	3D model available Symbol and footprint available 3	1 Download Model
	IS61C5128AS-25TLI Integrated Silicon Solution Inc.	1	SRAM 4M (512Kx8) 25ns Async SRAM	Small Outline Packages	IS61C5128AS-25TLI	3D model available Symbol and footprint available 3	1 Download Model
	IDT7025L20PFGI Renesas Electronics	1	IDT SRAM Memory, IDT7025L20PFGI- 128kbit	Quad Flat Packages	IDT7025L20PFGI	3D model available Symbol and footprint available 3	1 Download Model

	TC554001AFT-70V Toshiba	1	Low-power dissipationOperating: 55 mW/MHz (typical)• Standby current of 5 µA (maximum) at Ta = 25°C• Single power supply voltage of 2.7 to 5.5 V• Power down features using CE .• Data retention supply voltage of 2.0 to 5.5 V• Direct TTL compatibility for all inputs and outputs	Small Outline Packages	TC554001AFT-70V	3D model available Symbol and footprint available 3	1 Download Model
	CY7C1643KV18-450BZI Infineon	1	SRAM Chip Sync Dual 1.8V 144M-bit 8M x 18 0.45ns 165-Pin FBGA Tray	BGA	CY7C1643KV18-450BZI	3D model available Symbol and footprint available 3	1 Download Model
	IDT7024L15PFG Renesas Electronics	1	IDT IDT7024L15PFG SRAM Memory, 64kbit, 4.5 → 5.5 V, 15ns 100-Pin TQFP	Quad Flat Packages	IDT7024L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	IDT71V65903S80PFGI Renesas Electronics	1	IDT SRAM Memory, IDT71V65903S80PFGI- 9Mbit	Quad Flat Packages	IDT71V65903S80PFGI	3D model available Symbol and footprint available 3	1 Download Model
	HM628512CLP-5 HITACHI	1	4 M SRAM (512-kword × 8-bit)	Dual-In-Line Packages	HM628512CLP-5	3D model available Symbol and footprint available 3	1 Download Model
	CY62128ELL-45ZXIT Infineon	1	CYPRESS SEMICONDUCTOR - CY62128ELL-45ZXIT - SRAM, 1MBIT, 128KX8BIT, 45NS, TSOP-I-32	Small Outline Packages	CY62128ELL-45ZXIT	3D model available Symbol and footprint available 3	1 Download Model
	IS62WVS2568FBLL-20NLI-TR Integrated Silicon Solution Inc.	1	SRAM 2Mb, Serial SRAM, 2.2V-3.6V, 20MHz, 8 pin SOIC 150mil, RoHS	Small Outline Packages	IS62WVS2568FBLL-20NLI-TR	3D model available Symbol and footprint available 3	1 Download Model
	CY7C1041GN30-10BVJXIT Infineon	1	SRAM ASYNC SRAMS	BGA	CY7C1041GN30-10BVJXIT	3D model available Symbol and footprint available 3	1 Download Model
	71V25761S166PFGI Renesas Electronics	1	SRAM 128Kx36 SYNC 3.3V PIPELINED BURST SRAM	Quad Flat Packages	71V25761S166PFGI	3D model available Symbol and footprint available 3	1 Download Model
	IS62WV12816EBLL-45BLI Integrated Silicon Solution Inc.	1	SRAM 2Mb, Low Power/Power Saver,Async,128K x 16,45ns,2.2v-3.6v,48 Ball mBGA (6x8 mm), RoHS	BGA	IS62WV12816EBLL-45BLI	3D model available Symbol and footprint available 3	1 Download Model
	IDT70V25L25PFGI Renesas Electronics	1	IDT IDT70V25L25PFGI SRAM Memory, 128kbit, 3 → 3.6 V, 25ns 100-Pin TQFP	Quad Flat Packages	IDT70V25L25PFGI	3D model available Symbol and footprint available 3	1 Download Model

	7006L17G Renesas Electronics	1	The 7006 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7006L17G	3D model available Symbol and footprint available 3	1 Download Model
	71256L45TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	70T3719MS133BBG Renesas Electronics	1	The 70T3719M is a high-speed 256K x 72 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3719M can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3719MS133BBG	3D model available Symbol and footprint available 3	1 Download Model
	71V416S12PHG Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Small Outline Packages	71V416S12PHG	3D model available Symbol and footprint available 3	1 Download Model
	71256SA20PZGI8 Renesas Electronics	1	The 71256SA 5V CMOS SRAM is organized as 32K x 8. All bidirectional inputs and outputs of the 71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71256SA20PZGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V65603S133BGGI8 Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S133BGGI8	3D model available Symbol and footprint available 3	1 Download Model
	70V3579S4BF8 Renesas Electronics	1	The 70V3579 is a high-speed 32K × 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3579 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3579S4BF8	3D model available Symbol and footprint available 3	1 Download Model
	71V2556SA100BG8 Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2556SA100BG8	3D model available Symbol and footprint available 3	1 Download Model
	7140LA100CB Renesas Electronics	1	The 7140 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port RAM together with the 7130 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Ceramic Dual-In-Line Packages	7140LA100CB	3D model not available Symbol and footprint available 2	1 Download Model
	71V3556SA133BQ8 Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA133BQ8	3D model available Symbol and footprint available 3	1 Download Model
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