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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72831L25TF8 Renesas Electronics	1	The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s	Quad Flat Packages	72831L25TF8	3D model available Symbol and footprint available 3	1 Download Model
	72821L15PFI8 Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	72821L10TF8 Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L10TF8	3D model available Symbol and footprint available 3	1 Download Model
	72821L25TFI8 Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L25TFI8	3D model available Symbol and footprint available 3	1 Download Model

	72831L15TF8 Renesas Electronics	1	The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s	Quad Flat Packages	72831L15TF8	3D model available Symbol and footprint available 3	1 Download Model
	ADR4530ARZ-R7 Analog Devices	1	► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s	Small Outline Packages	ADR4530ARZ-R7	3D model available Symbol and footprint available 3	1 Download Model
	ADR4550ARZ-R7 Analog Devices	1	► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s	Small Outline Packages	ADR4550ARZ-R7	3D model available Symbol and footprint available 3	1 Download Model
	ADR4520BRZ Analog Devices	1	► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s	Small Outline Packages	ADR4520BRZ	3D model available Symbol and footprint available 3	1 Download Model
	5-103673-3 TE Connectivity	1	Body Features: Primary Product Color Black \| Configuration Features: PCB Mount Orientation Right Angle \| Number of Rows 1 \| Number of Positions 4 \| Contact Features: Contact Current Rating (Max) 3 AMP \| Mating Square Post Dimension .64 MM \| Contact Mating Area Plating Material Thickness 15 MICIN \| Contact Type Pin \| Contact Mating Area Plating Material Gold \| Contact Base Material Brass \| PCB Contact Termination Area Plating Material Finish Matte \| Contact Mating Area Length 5.84 MM \| Contact Shape & Form S	Other	5-103673-3	3D model available Symbol and footprint available 3	1 Download Model
	2-6339191-1 TE Connectivity	1	Body Features: Shield Plating Material Tin \| LED Color (Top Left) Green \| LED Color (Top Right) Orange \| Modular Jack Latch Orientation Inverted - Latch Up \| Shield Plating Finish Matte \| Shield Material Copper Alloy \| Connector Profile Standard \| Configuration Features: Port Configuration Single Port \| Number of PCB Ground Tabs 2 \| Status Light Type LED \| Panel Ground Location Top and Side \| Number of Positions 8 \| Port Matrix Configuration 1 x 1 \| Number of Loaded Positions 8 \| Connector Contact Density S	Other	2-6339191-1	3D model available Symbol and footprint available 3	1 Download Model
	72821L10PFG Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L10PFG	3D model available Symbol and footprint available 3	1 Download Model
	EL7583IREZ Renesas Electronics	1	The EL7583 is a 3-channel DC/DC converter IC which is designed primarily for use in TFT-LCD applications. It features a PWM boost converter with 2. 7V to 14V input capability and 5V to 17V output, which powers the column drivers and provides up to 470mA @ 12V, 370mA @ 15V from 5V supply. A pair of charge pump control circuits provide regulated outputs of VON and VOFF supplies at 8V to 40V and -5V to -40V, respectively, each at up to 60mA. The EL7583 features adjustable switching frequency, adjustable soft s	Small Outline Packages	EL7583IREZ	3D model available Symbol and footprint available 3	1 Download Model
	72831L10TF Renesas Electronics	1	The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s	Quad Flat Packages	72831L10TF	3D model available Symbol and footprint available 3	1 Download Model
	72821L25TFI Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L25TFI	3D model available Symbol and footprint available 3	1 Download Model
	ISL33334EIAZ-T Renesas Electronics	1	The ISL33334E, ISL33337E are two port interface ICs where port 1 is configured as a dual (2 Tx, 2 Rx) RS-232 transceiver and port 2 is a single RS-485/RS-422 transceiver. The on-board charge pump generates RS-232 compliant ±5V Tx output levels from a single VCC supply as low as 3. 15V. The transceivers are RS-232 compliant, with the Rx inputs handling up to ±25V. The port 2 transceiver supports both the RS-485 and RS-422 differential communication standards. The receiver features full fail-safe operation, s	Small Outline Packages	ISL33334EIAZ-T	3D model available Symbol and footprint available 3	1 Download Model

	ISL33337EIRZ Renesas Electronics	1	The ISL33334E, ISL33337E are two port interface ICs where port 1 is configured as a dual (2 Tx, 2 Rx) RS-232 transceiver and port 2 is a single RS-485/RS-422 transceiver. The on-board charge pump generates RS-232 compliant ±5V Tx output levels from a single VCC supply as low as 3. 15V. The transceivers are RS-232 compliant, with the Rx inputs handling up to ±25V. The port 2 transceiver supports both the RS-485 and RS-422 differential communication standards. The receiver features full fail-safe operation, s	Quad Flat No-Lead	ISL33337EIRZ	3D model available Symbol and footprint available 3	1 Download Model
	72841L15TFI8 Renesas Electronics	1	The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s	Quad Flat Packages	72841L15TFI8	3D model available Symbol and footprint available 3	1 Download Model
	72841L10TF Renesas Electronics	1	The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s	Quad Flat Packages	72841L10TF	3D model available Symbol and footprint available 3	1 Download Model
	72831L10PFG Renesas Electronics	1	The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s	Quad Flat Packages	72831L10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72831L15TFI8 Renesas Electronics	1	The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s	Quad Flat Packages	72831L15TFI8	3D model available Symbol and footprint available 3	1 Download Model
	72821L15PF8 Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L15PF8	3D model available Symbol and footprint available 3	1 Download Model
	ADR4533ARZ Analog Devices	1	► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s	Small Outline Packages	ADR4533ARZ	3D model available Symbol and footprint available 3	1 Download Model
	ADR4540BRZ Analog Devices	1	► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s	Small Outline Packages	ADR4540BRZ	3D model available Symbol and footprint available 3	1 Download Model
	ADR4540BRZ-R7 Analog Devices	1	► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s	Small Outline Packages	ADR4540BRZ-R7	3D model available Symbol and footprint available 3	1 Download Model
	STM708T/S/R STMicroelectronics	1	• Precision VCC monitor\r\n– T: 3.00 V ≤ VRST ≤ 3.15 V\r\n– S: 2.88 V ≤ VRST ≤ 3.00 V\r\n– R: STM706P: 2.59 V ≤ VRST ≤ 2.70 V\r\nRST and RST outputs\r\n• 200 ms (typ.) trec\r\n• Watchdog timer - 1.6 s (typ.)\r\n• Manual reset input (MR)\r\n• Power-fail comparator (PFI/PFO)\r\n• Low supply current - 40 µA (typ.)\r\n• Guaranteed RST (RST) assertion down to\r\nVCC = 1.0 V\r\n• Operating temperature: –40 °C to 85 °C\r\n(industrial grade)\r\n• RoHS compliance\r\n– Lead-free components are compliant with\r\nthe RoHS directive	Small Outline Packages	STM708T/S/R	3D model available Symbol and footprint available 3	1 Download Model
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