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3-84952-0
TE Connectivity
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1 | Body Features: Primary Product Color Natural | Configuration Features: Compatible With Wire & Cable Type FFC | PCB Mount Orientation Right Angle | Number of Rows 1 | Number of Positions 30 | Compatible With Wire & Cable Type FPC | Contact Features: Contact Mating Area Plating Material Thickness 78.74 MICIN | Contact Mating Area Plating Material Finish Bright | PCB Contact Termination Area Plating Material Finish Bright | PCB Contact Termination Area Plating Material Thickness 2 MICM | Contact Shape & Form S | Other | 3-84952-0 |
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CRG0805F22K
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Length .079 INCH | Product Width .049 INCH | Product Height .55 MM | Product Height .022 INCH | Product Width 1.25 MM | Product Length 2 MM | Electrical Characteristics: Passive Component Tolerance 1 PCT | Operating Voltage 150 V | Power Rating .125 WATT | Resistance Class 1kΩ – 1MΩ | Resistance Value 22K OHM | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRG0805F22K |
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EL7583IREZ-T13
Renesas Electronics
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1 | The EL7583 is a 3-channel DC/DC converter IC which is designed primarily for use in TFT-LCD applications. It features a PWM boost converter with 2. 7V to 14V input capability and 5V to 17V output, which powers the column drivers and provides up to 470mA @ 12V, 370mA @ 15V from 5V supply. A pair of charge pump control circuits provide regulated outputs of VON and VOFF supplies at 8V to 40V and -5V to -40V, respectively, each at up to 60mA. The EL7583 features adjustable switching frequency, adjustable soft s | Small Outline Packages | EL7583IREZ-T13 |
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72851L25TFI
Renesas Electronics
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1 | The 72851 is a 8K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72251 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72851 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72851L25TFI |
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CRGP0805F390K
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Length .079 INCH | Product Height .022 INCH | Product Height .55 MM | Product Width 1.25 MM | Product Length 2 MM | Product Width .049 INCH | Electrical Characteristics: Operating Voltage 150 V | Passive Component Tolerance 1 PCT | Power Rating .33 WATT | Resistance Class 1kΩ – 1MΩ | Resistance Value 390K OHM | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRGP0805F390K |
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ISL78208ARZ
Renesas Electronics
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1 | The ISL78208 is a dual standard buck regulator capable of 3A per channel with continuous output current. With an input range of 4. 5V to 28V, it provides a high frequency power solution for a variety of point of load applications. The PWM controller in the ISL78208 drives an internal switching N-Channel power MOSFET and requires an external Schottky diode to generate the output voltage. The integrated power switch is optimized for excellent thermal performance up to 3A of output current. The PWM regulator s | Quad Flat No-Lead | ISL78208ARZ |
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CRG1206F1M0
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Width 1.55 MM | Product Length 3.1 MM | Product Height .55 MM | Product Width .061 INCH | Product Height .022 INCH | Product Length .122 INCH | Electrical Characteristics: Passive Component Tolerance 1 PCT | Power Rating .25 WATT | Resistance Value 1M OHM | Operating Voltage 200 V | Resistance Class 1MΩ – 1GΩ | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRG1206F1M0 |
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72841L10TF8
Renesas Electronics
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1 | The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72841L10TF8 |
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72841L10PFG8
Renesas Electronics
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1 | The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72841L10PFG8 |
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72821L10PFG8
Renesas Electronics
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1 | The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72821L10PFG8 |
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72821L10PF
Renesas Electronics
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1 | The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72821L10PF |
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72831L25TF
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L25TF |
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CRGP1210F39K
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Width 2.6 MM | Product Length 3.1 MM | Product Height .022 INCH | Product Width .102 INCH | Product Height .55 MM | Product Length .122 INCH | Electrical Characteristics: Passive Component Tolerance 1 PCT | Resistance Value 39K OHM | Resistance Class 1kΩ – 1MΩ | Operating Voltage 200 V | Power Rating .75 WATT | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRGP1210F39K |
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72851L10TF
Renesas Electronics
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1 | The 72851 is a 8K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72251 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72851 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72851L10TF |
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72841L10PFG
Renesas Electronics
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1 | The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72841L10PFG |
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6368011-5
TE Connectivity
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1 | Body Features: LED Color (Bottom Left) Yellow | LED Color (Top Left) Yellow | Shield Plating Material Tin over Nickel | Connector Profile Low | LED Color (Bottom Right) Green | Modular Jack Latch Orientation Standard - Latch Down | Shield Material Copper Alloy | LED Color (Top Right) Green | Grounding Tab Plating Material Tin over Nickel | Configuration Features: Number of Positions 8 | Number of PCB Ground Tabs 6 | Port Matrix Configuration 2 x 1 | Number of Loaded Positions 8 | Connector Contact Density S | Other | 6368011-5 |
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72821L10PF8
Renesas Electronics
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1 | The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72821L10PF8 |
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ADR4530ARZ
Analog Devices
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1 | ► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s | Small Outline Packages | ADR4530ARZ |
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72821L10PFG
Renesas Electronics
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1 | The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72821L10PFG |
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EL7583IREZ
Renesas Electronics
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1 | The EL7583 is a 3-channel DC/DC converter IC which is designed primarily for use in TFT-LCD applications. It features a PWM boost converter with 2. 7V to 14V input capability and 5V to 17V output, which powers the column drivers and provides up to 470mA @ 12V, 370mA @ 15V from 5V supply. A pair of charge pump control circuits provide regulated outputs of VON and VOFF supplies at 8V to 40V and -5V to -40V, respectively, each at up to 60mA. The EL7583 features adjustable switching frequency, adjustable soft s | Small Outline Packages | EL7583IREZ |
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ISL33337EIRZ
Renesas Electronics
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1 | The ISL33334E, ISL33337E are two port interface ICs where port 1 is configured as a dual (2 Tx, 2 Rx) RS-232 transceiver and port 2 is a single RS-485/RS-422 transceiver. The on-board charge pump generates RS-232 compliant ±5V Tx output levels from a single VCC supply as low as 3. 15V. The transceivers are RS-232 compliant, with the Rx inputs handling up to ±25V. The port 2 transceiver supports both the RS-485 and RS-422 differential communication standards. The receiver features full fail-safe operation, s | Quad Flat No-Lead | ISL33337EIRZ |
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ISL33334EIAZ-T
Renesas Electronics
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1 | The ISL33334E, ISL33337E are two port interface ICs where port 1 is configured as a dual (2 Tx, 2 Rx) RS-232 transceiver and port 2 is a single RS-485/RS-422 transceiver. The on-board charge pump generates RS-232 compliant ±5V Tx output levels from a single VCC supply as low as 3. 15V. The transceivers are RS-232 compliant, with the Rx inputs handling up to ±25V. The port 2 transceiver supports both the RS-485 and RS-422 differential communication standards. The receiver features full fail-safe operation, s | Small Outline Packages | ISL33334EIAZ-T |
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72831L10PFG
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L10PFG |
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72841L15TFI8
Renesas Electronics
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1 | The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72841L15TFI8 |
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72841L10TF
Renesas Electronics
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1 | The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72841L10TF |
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