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OPA2364AIDRG4
Texas Instruments
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1 | Operational Amplifiers - Op Amps 1.8V High CMR RRIO Op Amp | Small Outline Packages | OPA2364AIDRG4 |
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832-3646
Wago
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1 | THT male header; 1.2 x 1.2 mm solder pin; angled; 100% protected against mismating; Silver-plated contacts; Pin spacing 10.16 mm; 6-pole | Other | 832-3646 |
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OPA2364IDGKTG4
Texas Instruments
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1 | Operational Amplifiers - Op Amps 1.8V High CMR RRIO Op Amp | Small Outline Packages | OPA2364IDGKTG4 |
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TS5A22364DGSRG4
Texas Instruments
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1 | Analog Switch ICs 0.65-Ohm Dual SPDT Ana Sw | Small Outline Packages | TS5A22364DGSRG4 |
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OPA2364AIDGKT
Texas Instruments
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1 | Dual low power op-amp,OPA2364AIDGK MSOP8 | Small Outline Packages | OPA2364AIDGKT |
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OPA2364AIDR
Texas Instruments
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1 | 1.8V, High CMR, RRIO Op Amp | Small Outline Packages | OPA2364AIDR |
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OPA2364ID
Texas Instruments
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1 | Texas Instruments OPA2364ID, Dual Op Amp, 7MHz CMOS, Rail to Rail, 3 V, 5 V, 8-Pin SOIC | Other | OPA2364ID |
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M20-9723645
Harwin
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1 | M20: 36+36 Pos Plug DIL Straight 3mm THT Connector 7mm pin Gold | Other | M20-9723645 |
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723646L15PF
Renesas Electronics
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1 | The 723646 is a 1K x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. Communication between each port may bypass the FIFOs via two mailbox registers. These devices can operate in the IDT Standard mode or First Wo | Quad Flat Packages | 723646L15PF |
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723641L15PF
Renesas Electronics
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1 | The 723641 is a 1K x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals. | Quad Flat Packages | 723641L15PF |
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723641L15PFG
Renesas Electronics
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1 | The 723641 is a 1K x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals. | Quad Flat Packages | 723641L15PFG |
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723643L12PFG8
Renesas Electronics
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1 | The 723643 is a 1K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. | Quad Flat Packages | 723643L12PFG8 |
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B82450A2364A000
TDK
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1 | Transponder Coils, L=2.36mH, LxWxT : | Other | B82450A2364A000 |
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B82450H2364A000
TDK
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1 | Transponder Coils, L=2.36mH, LxWxT : | Other | B82450H2364A000 |
3
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1842364
Phoenix Contact
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1 | MDSTB 2,5/ 2-GF-5,08 - PCB headers, nominal cross section: 2.5 mm2, color: green, nominal current: 10 A, rated voltage (III/2): 320 V, contact surface: Sn, contact connection type: Pin, number of potentials: 4, number of rows: 2, number of positions: 2, number of connections: 4, product range: MDSTB 2,5/..-GF, pitch: 5.08 mm, mounting: Wave soldering, pin layout: Linear pinning, solder pin [P]: 3.23 mm, number of solder pins per potential: 1, plug-in system: COMBICON MSTB 2,5, Pin connector patte | Other | 1842364 |
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723644L15PF8
Renesas Electronics
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1 | The 723644 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. | Quad Flat Packages | 723644L15PF8 |
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723642L15PF8
Renesas Electronics
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1 | The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. | Quad Flat Packages | 723642L15PF8 |
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2SK2364-AZ
Renesas Electronics
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1 | The 2SK2364 is a Switching N-Channel Power Mosfet. | Transistor Outline, Vertical | 2SK2364-AZ |
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B82450A2364E000
TDK
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1 | Transponder Coils, L=2.36mH, LxWxT : | Other | B82450A2364E000 |
3
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TS5A22364DRCR
Texas Instruments
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1 | Analog Switch ICs 0.65-Ohm Dual SPDT A na Switch | Other | TS5A22364DRCR |
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744-392/364-000
Wago
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1 | PCB terminal block; 1.5 mm²; Pin spacing 3.5 mm; 2-pole; PUSH WIRE® | Other | 744-392/364-000 |
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4-2364427-4
TE Connectivity
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1 | Board-to-Board, 164 Position, 1 mm [.04 in] Centerline, Vertical, Black, 11.25 mm [.44 in] Height, 8.2 mm [.32 in] Width, PCI & PCI Express Connectors | Other | 4-2364427-4 |
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723644L12PF8
Renesas Electronics
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1 | The 723644 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. | Quad Flat Packages | 723644L12PF8 |
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723643L12PFG
Renesas Electronics
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1 | The 723643 is a 1K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. | Quad Flat Packages | 723643L12PFG |
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723641L20PFI
Renesas Electronics
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1 | The 723641 is a 1K x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals. | Quad Flat Packages | 723641L20PFI |
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